Semiconductor Device Front-End Insulating Layer Impurity Gradient
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Solution Overview
Problem
Conventional semiconductor devices face reliability issues due to impurities from insulating substrates diffusing into the semiconductor layer during heat treatment processes, affecting the threshold value and performance of Thin Film Transistors (TFTs).
Innovation Solution
A semiconductor device is designed with a front-end insulating layer that has a controlled impurity concentration, decreasing by an average rate of 1/1000-fold per 1 nm from the insulating substrate surface to the semiconductor layer, effectively preventing impurity diffusion and maintaining the semiconductor layer's integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a front-end insulating layer is interposed between the semiconductor layer and the insulating substrate, then impurity invasion into the semiconductor layer is blocked, but impurities diffuse into the front-end insulating layer during heat treatment processes
Solution Approach 1:
The patent applies local quality by creating a front-end insulating layer with non-uniform impurity concentration distribution. The impurity concentration is deliberately controlled to be higher near the insulating substrate interface and lower near the semiconductor layer interface, forming a gradient structure that locally optimizes both barrier function and diffusion resistance.
Solution Approach 2:
The patent changes the impurity concentration parameter within the front-end insulating layer by controlling the deposition conditions to achieve a specific gradient profile. This parameter change transforms the uniform structure into a graded structure where impurity concentration varies continuously from the substrate interface to the semiconductor interface.
2Productivity
If heat treatment processes are performed at high temperature to activate impurities, then source and drain regions are formed, but impurities diffuse from the insulating substrate into the front-end insulating layer
Solution Approach 1:
The patent applies preliminary action by pre-configuring the impurity concentration gradient in the front-end insulating layer before heat treatment. This preliminary structure preparation ensures that during subsequent high-temperature processing, the gradient profile actively resists impurity diffusion from the substrate, allowing normal activation processes without excessive contamination.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the reliability of the semiconductor device by preventing impurity-induced changes in the threshold value, maintaining performance without compromising activation rates or increasing manufacturing costs.
Implementation Method 1
impurity concentration decreases at an average rate being about 1/1000-fold per 1 nm from a surface of the insulating substrate toward the semiconductor layer
Data Source
AI summary
A semiconductor device in which a semiconductor layer is formed on an insulating substrate with a front-end insulating layer interposed between the semiconductor layer and the insulating substrate is provided which is capable of preventing action of an impurity contained in the insulating substrate on the semiconductor layer and of improving reliability of the semiconductor device. In a TFT (Thin Film Transistor), boron is made to be contained in a region located about 100 nm or less apart from a surface of the insulating substrate so that boron concentration decreases at an average rate being about 1/1000-fold per 1 nm from the surface of the insulating substrate toward the semiconductor layer.