Semiconductor Device Function Branch History Recording Without ID Memory
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Solution Overview
Problem
Existing semiconductor devices require an ID memory to record function execution history, which increases the device's cost.
Innovation Solution
A semiconductor device with a CPU, a first register to store the current instruction address, a second register to store return addresses during function branches, and a generation circuit that outputs function branch information based on register values before and after instruction execution, eliminating the need for an ID memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an ID memory is mounted onto the semiconductor device to record function execution history, then the function execution history can be recorded, but the cost of the semiconductor device increases
Solution Approach 1:
The patent extracts the function execution history recording capability from a separate ID memory component and integrates it into the existing register structure of the semiconductor device. By utilizing the program counter and link register that already exist in the CPU architecture, the patent eliminates the need for an additional ID memory component, thereby reducing manufacturing cost while maintaining the ability to record function execution history.
Solution Approach 2:
The patent makes the existing registers (program counter and link register) serve multiple functions. These registers not only perform their traditional CPU control functions but also simultaneously store function execution history information. This multi-functionality approach allows the semiconductor device to record function execution history without adding dedicated memory components, thus reducing overall device cost.
2Reliability
If an ID memory is mounted onto the semiconductor device to store instruction addresses and function IDs, then the function execution history can be recorded, but the device complexity increases
Solution Approach 1:
The patent merges the function execution history recording function with the existing CPU register structure. Instead of having a separate ID memory component, the patent combines the history recording capability with the program counter and link register that are already part of the CPU architecture. This merging reduces device complexity by eliminating redundant components while maintaining the required functionality.
Data Source
AI summary
A semiconductor device includes a CPU configured to execute an instruction, a first register configured to store an address of the instruction currently being executed, a second register configured to store a return address when a function branch occurs, and a generation circuit configured to generate and output function branch information indicating an address of a function branch destination when the function branch occurs. The generation circuit is configured to determine whether or not the function branch has occurred based on values of the first register and the second register before and after instruction execution by the CPU, and, when determining that the function branch has occurred, output the value of the first register after the instruction execution by the CPU as the function branch information.