Semiconductor Fuse Array for Multi-Core Configuration
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Solution Overview
Problem
As microprocessor complexity increases, the need for configuration data storage on a multi-core device poses challenges due to limited real estate and power constraints, with existing fuse array technologies struggling to accommodate the growing requirements for configuration data across multiple cores.
Innovation Solution
A semiconductor fuse array is implemented with a first plurality of fuses for encoded and compressed configuration data and a second plurality for fuse correction data, allowing each core to access and decompress the data during power-up/reset, thereby reducing the real estate and power required for configuration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If traditional fuse arrays are used to store configuration data for each core, then each core can be configured independently, but the real estate and power requirements increase significantly with the number of cores
Solution Approach 1:
Multiple fuse arrays from different cores are merged into a single shared fuse array. The patent combines fuse arrays from multiple cores into one common array that stores compressed configuration data for all cores, eliminating the need for separate fuse arrays per core and significantly reducing die real estate requirements.
Solution Approach 2:
Configuration data is compressed by nesting redundant information. The patent uses compression algorithms to encode configuration data such that identical or similar configuration patterns across multiple cores are represented more efficiently, reducing the total number of fuses needed while maintaining full configuration capability.
2Use of energy by stationary object
If fuse array size is reduced to save real estate, then power consumption decreases, but the ability to store sufficient configuration data for complex multi-core devices is compromised
Solution Approach 1:
The patent changes the parameter of data representation by implementing compressed encoding schemes. Configuration data is stored in a compressed format that uses fewer bits per configuration element, allowing the same amount of configuration information to be stored in a smaller fuse array, thereby reducing both real estate and power consumption.
Solution Approach 2:
Instead of storing full configuration data in each core's dedicated fuse array, the patent stores a single compressed copy of the configuration data in a shared fuse array. All cores access this single copy, eliminating redundant storage and reducing the total quantity of configuration data that must be stored.
3Area of stationary object
If compressed configuration data is used to reduce real estate, then fewer fuses are needed, but the complexity of data decompression and processing increases
Solution Approach 1:
Configuration data is compressed during the manufacturing/programming phase before the device is deployed. The compression is performed in advance using known algorithms, and the compressed data is programmed into the fuse array. During device operation, only decompression is needed, which is simpler than both compression and decompression, thereby managing complexity while achieving space savings.
Data Source
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AI summary
An apparatus includes a semiconductor fuse array, disposed on a die, into which is programmed configuration data. The semiconductor fuse array has a first plurality of semiconductor fuses and a second plurality of semiconductor fuses. The first plurality of semiconductor fuses is configured to store the configuration data in an encoded and compressed format. The second plurality of semiconductor fuses is configured to store first fuse correction data that indicates locations and values corresponding to a first one or more fuses within the first plurality of fuses whose states are to be changed from that which was previously stored.