Semiconductor Fuse Placement at Active Region Corner
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Solution Overview
Problem
Conventional semiconductor designs that incorporate fuse elements to replace defective cells increase the chip area due to the placement of fuse elements in the core circuit forming region or external pads, leading to inefficient use of space and potential wire short-circuits.
Innovation Solution
The placement of fuse elements at the corners of the active region, allowing for electrical fusion without occupying the core circuit forming region, and using unconnected pads near the corners for fusion, enabling the reduction of semiconductor chip area and preventing wire short-circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If fuse elements are arranged in the core circuit forming region or external pads, then fuse functionality is achieved, but chip area increases and wire short-circuit risk increases
Solution Approach 1:
The fuse element is arranged in the buffer forming region, which is a different spatial dimension/zone from the core circuit forming region and external pads. This relocates the fuse from traditional high-density areas to an underutilized buffer zone, achieving fuse functionality without increasing the effective chip area used for functional circuits.
Solution Approach 2:
The buffer forming region, which has different functional requirements compared to the core circuit region, is utilized for fuse placement. This local differentiation allows the fuse to occupy space that would otherwise be unused or less critical, thereby maintaining overall chip area efficiency while ensuring fuse operability.
2Reliability
If fuse elements are arranged in the core circuit forming region, then fuse functionality is achieved, but wire short-circuit risk increases
Solution Approach 1:
The fuse element is extracted from the core circuit forming region and placed in the buffer forming region. This separation removes the potential source of wire short-circuits from the dense core circuit area, eliminating the harmful interaction between fuse wires and core circuit wires while preserving fuse functionality in the isolated buffer region.
Solution Approach 2:
The chip is segmented into distinct functional regions: core circuit forming region, buffer forming region, and pad forming region. By placing the fuse in the buffer region, the design creates spatial segmentation that isolates the fuse from the core circuit, thereby preventing wire short-circuits while maintaining fuse operability through dedicated buffer region routing.
3Reliability
If fuse elements are placed in traditional locations, then fuse functionality is achieved, but chip density decreases
Solution Approach 1:
The buffer forming region, which may be considered unused or secondary space in traditional designs, is recovered and utilized for fuse element placement. This transforms previously underutilized space into functional real estate, thereby increasing chip density by making productive use of all available chip real estate including buffer zones.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for reliable fusion of fuse elements without increasing the chip area, utilizing previously unused space and preventing wire short-circuits, thereby enhancing chip density and implementation efficiency.
Implementation Method 1
blowing the fuse by applying voltage to the plurality of pads by probing
Data Source
AI summary
A semiconductor device comprises an active region including a core circuit forming region and a buffer forming region, and a fuse element forming region arranged on a corner of the active region and to be able to be electrically fused. It is possible to arrange the fuse element without forming the fuse in the core circuit forming region by arranging the fuse element forming region at the corner of the active region.