Semiconductor Fuse Structure with Etch Stop Layer for Corrosion Protection
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Solution Overview
Problem
The miniaturization and increased integration of semiconductor devices make them vulnerable to defects and impurities during manufacturing, with existing fuse structures facing issues such as corrosion and oxidation due to the thickness and uniformity of dielectric layers, and residues from photolithography processes.
Innovation Solution
A method and structure for forming pad openings and fuse openings concurrently, using a liner and etching stop layer to selectively expose the pad and fuse metals, with a dielectric layer covering the fuse metal to prevent corrosion, and etching steps to achieve precise control and uniformity, allowing for a stable fusing process and improved yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a dielectric layer is formed to cover the fuse metal to prevent corrosion and oxidation, then the reliability of the fuse metal is improved, but the thickness and uniformity of the dielectric layer interfere with the fusing process
Solution Approach 1:
The dielectric layer is segmented into two distinct layers: a first dielectric layer with greater thickness providing corrosion protection, and a second dielectric layer with smaller thickness allowing precise fusing control. This segmentation resolves the contradiction by assigning different functional requirements to different portions of the dielectric structure.
Solution Approach 2:
Different regions of the dielectric structure have different thicknesses tailored to specific functional needs. The first dielectric layer has larger thickness for corrosion protection in areas where fuse metal exposure is not required, while the second dielectric layer has smaller thickness in areas where precise fusing control is needed, achieving local optimization of both protection and manufacturing precision.
2Ease of manufacture
If photoresist and developing solutions are used in photolithography processes to form pad openings and fuse openings, then the openings are successfully formed, but residues or metal corrosion occurs
Solution Approach 1:
An etch stop layer is introduced as an intermediary between the dielectric layers and the fuse metal. This etch stop layer serves as a protective barrier during photolithography processes, preventing photoresist and developing solutions from directly contacting the fuse metal, thereby eliminating residues and corrosion while still allowing successful opening formation.
Solution Approach 2:
The etch stop layer is formed beforehand to provide protective cushioning against harmful photolithography chemicals. This preventive measure ensures that the fuse metal is protected from corrosion and residues before the photolithography process occurs, maintaining metal integrity throughout manufacturing.
3Reliability
If the dielectric layer thickness is increased to improve coverage and protection, then the corrosion prevention is enhanced, but the fusing process control becomes more difficult
Solution Approach 1:
The dielectric protection is segmented into two layers with different thicknesses. The first dielectric layer provides thick protection for corrosion prevention, while the second dielectric layer provides thin coverage for precise fusing control. This segmentation allows both enhanced protection and maintained fusing control to coexist.
Solution Approach 2:
The first dielectric layer applies excessive thickness for maximum corrosion protection where needed, while the second dielectric layer applies partial thickness only where precise fusing control is required. This partial/excessive action strategy optimizes both protection and control without requiring uniform thickness throughout.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the formation of pad and fuse openings with improved yield and stability, preventing corrosion and oxidation of fuse metals, and ensuring a reliable fusing process by maintaining a controlled dielectric layer thickness and uniformity.
Implementation Method 1
An etching step having etching selectivity between the dielectric layer and the etching stop layer is then performed to remove the exposed dielectric layer from the pad opening and the fuse opening downwardly
Data Source
AI summary
A method for forming a semiconductor structure is disclosed. A substrate is provided. A pad metal and a fuse metal are formed on the substrate. A liner is formed on the pad metal and on the fuse metal. An etching stop layer is formed on the portion of the liner on the fuse metal. A dielectric layer and a passivation layer are formed on the liner and on the etching stop layer. After defining a pad opening and a fuse opening in the passivation layer, a first etching step is performed to remove the dielectric layer from the pad opening and the fuse opening until the pad metal and the etching stop layer are exposed. Afterward, a second etching step is performed to remove the exposed etching stop layer from the fuse opening until the liner on the fuse metal is exposed.