Semiconductor Fuse Structure for Plasma Charge Discharge

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Solution Overview

Problem

During the manufacturing of semiconductor devices, such as flash memory, electrical charges accumulate in the charge storage layer due to plasma formed during processes like dry etching or plasma chemical vapor deposition, leading to unintended trapping that cannot be easily erased, causing operational issues.

Innovation Solution

The implementation of a fuse structure or thermally variable resistor structure within the semiconductor device to facilitate the dissipation of electrical charges to an electrical ground or silicon substrate, reducing charge accumulation by physically cutting off the connection during normal operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If plasma processes (dry etching or plasma CVD) are used during manufacturing, then manufacturing precision and device fabrication are improved, but electrical charges accumulate in the charge storage layer causing programming errors

Engineering Contradiction:
Improvefabrication precisionVSAvoidprogramming accuracy
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent extracts and removes the harmful electrical charges accumulated in the charge storage layer through a dedicated discharge process. A voltage is applied between the bit lines to generate plasma that neutralizes and removes the trapped charges, separating the charge removal function from the normal memory operation.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent performs charge discharge as a preliminary action before normal memory operations. By applying voltage between bit lines to remove accumulated charges before programming or reading operations, the system prevents programming errors from occurring in the first place.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If voltage is applied between bit lines to discharge charges, then charge accumulation is reduced, but device complexity increases due to additional discharge circuitry

Engineering Contradiction:
Improvecharge discharge effectivenessVSAvoiddischarge mechanism complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent uses the existing bit lines of the memory device to perform the charge discharge function. By applying voltage between the same bit lines used for normal memory operations, the system utilizes its own structure for charge removal without requiring separate discharge electrodes or additional complex circuitry.

Inventive Principle:
Principle #25Self-service

3Reliability

If fuse structure is used to cut off connection during normal operation, then charge accumulation is prevented, but manufacturing complexity increases

Engineering Contradiction:
Improvecharge isolation effectivenessVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent implements a dynamic connection state using a fuse structure that transitions from connected to disconnected. During manufacturing, the fuse is intact allowing charge discharge; after manufacturing completion, the fuse is blown to isolate the charge storage layer, providing time-dependent connectivity control.

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces programming errors by ensuring that electrical charges accrued during manufacturing are discharged, thereby minimizing the accumulation of charges in the charge storage layer, enhancing the reliability of semiconductor devices.

Implementation Method 1

facilitate the dissipation of electrical charges to an electrical ground or silicon substrate

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

thermally variable resistor structure

Methodology Applied
Scientific EffectThermal resistance variation: Thermo-resistive Effect

Data Source

PatentUS8749012B2Methods and structures for discharging plasma formed during the fabrication of semiconductor device
Publication Date: 2014.06.10 INFINEON TECHNOLOGIES LLC
  • US8749012B2 patent drawing
  • US8749012B2 patent drawing
  • US8749012B2 patent drawing

AI summary

Methods and structures for discharging plasma formed during the fabrication of semiconductor device are disclosed. The semiconductor device includes a wordline, a common ground line and a fuse structure for electrically coupling the wordline and the common ground line until a break signal is applied via the fuse structure.