Semiconductor Fuse Layout With Epitaxial PUF Randomization
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Solution Overview
Problem
Semiconductor devices face challenges in integrating random variables to realize physically unclonable functions (PUFs) for enhanced security, especially in the context of Internet of Things (IoT) where hardware security is critical.
Innovation Solution
The semiconductor device incorporates an insulating structure with recessed portions formed through ion implantation or etching processes, which create process variations. These variations are used to form spacers that partially or completely cover the semiconductor layers of electrical fuse elements, allowing for the formation of epitaxial structures that connect some but not all adjacent electrical fuse elements, thereby creating a random logic matrix that serves as a PUF.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If random variables are introduced into semiconductor processes to realize PUF function, then information security of IoT devices is improved, but manufacturing precision and reliability of electrical fuse elements deteriorate
Solution Approach 1:
The electrical fuse element is divided into multiple segments separated by insulating structures. Each segment can be independently controlled, allowing random variables to be introduced at specific locations without affecting the entire fuse element. This segmentation enables PUF functionality while maintaining manufacturing precision for each individual segment.
Solution Approach 2:
Random variables are introduced locally at specific positions within the electrical fuse element rather than uniformly throughout. The insulating structures are placed at predetermined locations to create localized regions where process variations can occur, enabling PUF functionality while maintaining consistent manufacturing quality in other critical areas.
2Adaptability or versatility
If insulating structures are formed in substrate to create process variations, then PUF function is realized, but device complexity increases
Solution Approach 1:
The insulating structures serve dual purposes: they electrically isolate adjacent electrical fuse elements to enable PUF functionality, and they act as spacers to maintain proper spacing between elements. By merging multiple functions into a single structure, the overall device complexity is reduced despite adding PUF capabilities.
Solution Approach 2:
The insulating structures perform multiple functions simultaneously: electrical isolation, mechanical spacing, and serving as references for process variations. This multi-functionality reduces the need for additional dedicated structures, thereby limiting the increase in device complexity while achieving PUF functionality.
3Reliability
If electrical fuse elements are formed at two sides of insulating structure, then redundancy and security are improved, but manufacturing precision deteriorates due to process variations
Solution Approach 1:
The insulating structures are formed in the substrate before the electrical fuse elements are deposited. This preliminary action establishes fixed reference positions that guide subsequent fabrication steps, allowing process variations to occur without compromising the dimensional control and alignment of the electrical fuse elements.
Solution Approach 2:
The insulating structures act as intermediary elements between adjacent electrical fuse elements. They provide a stable reference framework that mediates the interaction between neighboring elements, allowing process variations to be absorbed locally without affecting the overall dimensional control and redundancy of the fuse element array.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively introduces randomness and uniqueness into semiconductor devices, enhancing their security by creating a unique electronic fingerprint that is difficult to replicate, thus improving the information security of IoT devices.
Implementation Method 1
an insulating structure with recessed portions formed through ion implantation or etching processes
Implementation Method 2
an insulating structure with recessed portions formed through ion implantation or etching processes
Implementation Method 3
an epitaxial structure disposed above the insulating structure and electrically connecting the semiconductor layer of the first electrical fuse element to the semiconductor layer of the second electrical fuse element
Data Source
AI summary
A semiconductor device includes an insulating structure, a first electrical fuse element, a second electrical fuse element, a first spacer, a second spacer and an epitaxial structure. The insulating structure is disposed in a substrate. The first electrical fuse element and the second electrical fuse element are disposed at two sides of the insulating structure. Each of the first electrical fuse element and the second electrical fuse element includes a semiconductor layer disposed on the substrate and a mask layer disposed on the semiconductor layer. The first spacer partially covers a sidewall of the semiconductor layer of the first electrical fuse element adjacent to the insulating structure. The second spacer partially covers a sidewall of the semiconductor layer of the second electrical fuse element adjacent to the insulating structure. The epitaxial structure is disposed above the insulating structure and electrically connects the two semiconductor layers.