Semiconductor Fuse Structure with Surface Oxide Layer
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Solution Overview
Problem
Current semiconductor structures face challenges in integrating interconnect structures with high electromigration resistance and fuse structures with lower electromigration resistance within the same interconnect level, as existing technologies do not effectively manage electromigration-induced void formation and hillock formation in fuse elements.
Innovation Solution
A semiconductor structure is developed with an interconnect structure having high electromigration resistance and a fuse structure with lower electromigration resistance, where the fuse structure includes a conductive material embedded in an interconnect dielectric with a surface oxide layer, and a dielectric capping layer atop, degrading adhesion and causing electromigration failure when current is applied.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a uniform interconnect structure is used for both interconnect lines and fuse elements, then manufacturing is simplified, but the fuse structure cannot achieve reliable electromigration-based failure while the interconnect maintains high reliability
Solution Approach 1:
The patent applies local quality by forming a surface oxide layer selectively on the fuse structure conductive material, while the interconnect structure remains oxide-free. This localized modification creates different electromigration characteristics in different regions of the same interconnect level, enabling the fuse to fail reliably under electromigration stress while the interconnect maintains high reliability.
2Reliability
If the interconnect structure is optimized for high electromigration resistance, then signal transmission reliability is improved, but the fuse structure cannot be integrated at the same interconnect level with comparable performance characteristics
Solution Approach 1:
The patent enables integration of fuse structures at the same interconnect level by applying local quality modification through selective oxide formation. The interconnect lines maintain their high electromigration resistance properties, while the fuse elements acquire surface oxide layers that enable controlled electromigration failure, thus achieving both high interconnect reliability and fuse functionality within the same level.
3Reliability
If a surface oxide layer is added to the fuse structure to enable electromigration failure, then fuse programming reliability is improved, but the adhesion between the conductive material and dielectric capping layer is degraded
Solution Approach 1:
The patent converts the harmful effect of degraded adhesion (caused by surface oxide formation) into a beneficial effect for fuse operation. The surface oxide layer, which would normally be considered a defect reducing adhesion strength, is deliberately formed to enable controlled electromigration and reliable fuse failure. The adhesion degradation is thus transformed from a disadvantage into a mechanism that facilitates fuse programming.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the formation of a semiconductor structure where the interconnect structure maintains high electromigration resistance while the fuse structure can be selectively opened by electromigration, addressing the need for both high and low electromigration resistance within the same interconnect level.
Implementation Method 1
electromigration (EM) has been identified as one metal failure mechanism. EM is one of the worst reliability concerns for very large scale integrated (VLSI) circuits. The problem not only needs to be overcome during the process development period in order to qualify the process, but it also persists through the lifetime of the chip. Voids are created inside the metal conductor of an interconnect structure due to metal ion movement caused by the high density of current flow.
Implementation Method 2
the fuse structure includes a conductive material, e.g., conductive feature, embedded within an interconnect dielectric in which the upper surface of the conductive material has a surface oxide layer present thereon
Data Source
AI summary
A semiconductor structure is provided that includes an interconnect structure and a fuse structure located in different areas, yet within the same interconnect level. The interconnect structure has high electromigration resistance, while the fuse structure has a lower electromigration resistance as compared with the interconnect structure. The fuse structure includes a conductive material embedded within an interconnect dielectric in which the upper surface of the conductive material has a high concentration of oxygen present therein. A dielectric capping layer is located atop the dielectric material and the conductive material. The presence of the surface oxide layer at the interface between the conductive material and the dielectric capping layer degrades the adhesion between the conductive material and the dielectric capping layer. As such, when current is provided to the fuse structure electromigration of the conductive material occurs and over time an opening is formed in the conductive material blowing the fuse element.