Semiconductor Gap Filling with Thermoplastic Reflow for Channel Isolation
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Solution Overview
Problem
In semiconductor processing, partially filling the gap between two superimposed features is challenging due to the shadow effect during the etch back process, which limits the minimum gap height that can be achieved and results in a spike formation, making it difficult to isolate transistor channels effectively.
Innovation Solution
A method involving the use of a thermoplastic material to partially fill the space between superimposed structures, where the space is initially filled with a photosensitive thermoplastic material, a portion is selectively removed through exposure to electromagnetic radiation, and the remaining material is heated to reduce its height, allowing for a more controlled and flat interface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the space between two superimposed features is entirely filled with material and then etched back, then the gap can be partially filled, but the shadow effect during etching causes spike formation and imposes a lower limit on the achievable gap height
Solution Approach 1:
The patent changes the physical state of the filling material from solid to liquid by heating it above its glass transition temperature. This parameter change allows the material to flow and conform to the desired shape without forming spikes, eliminating the harmful effect while maintaining precise gap height control.
Solution Approach 2:
The patent replaces the mechanical etching process with a thermal processing approach. Instead of using etch chemistry that causes shadow effects and spike formation, the invention uses controlled heating to melt and reshape the filling material, substituting a mechanical/removal-based process with a thermal/phase-change-based process.
2Adaptability or versatility
If traditional etch back methods are used to partially fill the space, then material can be removed from the top, but the process window is limited and smaller spaces cannot be effectively filled
Solution Approach 1:
The patent introduces dynamic control by heating the filling material above its glass transition temperature, transforming it from a rigid solid to a viscous liquid state. This allows the material to dynamically adjust its shape and flow into smaller spaces, expanding the process window while maintaining precise filling control through controlled cooling and solidification.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the partial filling of smaller spaces (up to 10 nm smaller than traditional methods) with a flat top surface, increasing the process window and allowing for the formation of different gate stacks on transistor channels without imposing a lower limit on gap height, thereby improving the isolation of superimposed structures.
Implementation Method 1
heating up the remaining thermoplastic material so as to reduce its height
Implementation Method 2
a portion is selectively removed through exposure to electromagnetic radiation
Data Source
AI summary
A method for partially filling a space between two superimposed structures in a semiconductor device under construction is provided. The method includes the steps of: (a) providing the two superimposed structures having said space therebetween; (b) entirely filling said space with a thermoplastic material; (c) removing a first portion of the thermoplastic material present in the space, the first portion comprising at least part of a top surface of the thermoplastic material, thereby leaving in said space a remaining thermoplastic material having a height; and (d) heating up the remaining photosensitive thermoplastic material so as to reduce its height. A replacement metal gate process for forming a different gate stack on two superimposed transistor channels in a semiconductor device under construction as well as a semiconductor device under construction is also provided.