Semiconductor Gate Driver Boosting for Fast Slew Without Larger Chip Area

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Solution Overview

Problem

In semiconductor devices with gate drivers for voltage-controlled transistors, the trade-off between high-rate driving and chip area is challenging due to the need for internal power supply circuit capacitance, which limits current driving capability and slew rate, especially when the gate withstand voltage is low.

Innovation Solution

The semiconductor device incorporates a gate booster circuit that supplies current from the power supply voltage node to rapidly boost the gate voltage of the low-side driver and a gate step-down circuit that rapidly steps down the gate voltage of the high-side driver, using protection circuits to prevent voltage exceedance, thereby improving slew rate without increasing chip area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If internal power supply circuit capacitance is increased to secure instantaneous driving current for high-rate driving, then high-rate driving capability is improved, but chip area increases

Engineering Contradiction:
Improvehigh-rate driving capabilityVSAvoidchip area
Core Design Contradiction:
ProductivityVSArea of stationary object

Solution Approach 1:

The patent introduces an external capacitor as an intermediary energy storage element connected to the power supply circuit. This external capacitor serves as a mediator that provides instantaneous driving current during high-rate switching operations, thereby eliminating the need to increase the internal power supply circuit capacitance and keeping the chip area small while maintaining high-rate driving capability

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent moves the capacitance function from the internal chip domain to the external circuit domain by connecting an external capacitor to the power supply terminal. This dimensional shift allows the system to achieve the required instantaneous current capability without increasing the internal chip area, as the energy storage function is realized in the external circuit rather than within the chip itself

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Area of stationary object

If internal power supply circuit size is reduced to fit chip size requirements, then chip area is reduced, but current driving capability and slew rate deteriorate

Engineering Contradiction:
Improvechip areaVSAvoidcurrent driving capability
Core Design Contradiction:
Area of stationary objectVSProductivity

Solution Approach 1:

The external capacitor acts as an intermediary that compensates for the reduced internal capacitance. By connecting this external energy storage element to the power supply circuit, the system maintains adequate instantaneous current driving capability even with a minimized internal power supply circuit, thus achieving both small chip area and sufficient current driving capability

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The external capacitor serves the system by providing the instantaneous current boost during switching transitions. The power supply circuit with reduced internal capacitance relies on this external component to fulfill its current delivery requirement, allowing the internal circuit to be minimized while the external capacitor handles the high-current transient demands

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS20250007509A1Semiconductor device
Publication Date: 2025.01.02 KK TOSHIBA
  • US20250007509A1 patent drawing
  • US20250007509A1 patent drawing
  • US20250007509A1 patent drawing

AI summary

According to one embodiment, a semiconductor device includes a first transistor, a first power supply circuit, a first circuit and a second circuit. The first transistor has a gate-source withstand voltage lower than an externally input power supply voltage. The first power supply circuit is configured to output a first voltage lower than the externally input power supply voltage. The first circuit is configured to drive a gate of the first transistor using the first voltage as a power supply. The second circuit is configured to supply a first current to the gate of the first transistor from a power supply voltage node to which the externally input power supply voltage is supplied.