Semiconductor Gate Structure for Metal-Diffusion-Safe Contact Plugs
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Solution Overview
Problem
In the fabrication of semiconductor structures, particularly in DRAM with an HKMG structure, the shared contact structure between the active area and gate leads to metal pollution due to the etching of the spacer on the protect gate, causing diffusion of lanthanum and aluminum into the contact plug, which contaminates the machine environment and the contact plug itself.
Innovation Solution
A semiconductor structure design featuring a high dielectric constant gate with a gate electrode layer and an oxide insulating layer in the second region, where the second contact plug is lapped with the second gate structure, avoiding metal diffusion pollution by reducing the connection area of metal on the upper layer and protecting device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a common contact structure is used for active area and gate in DRAM layout design, then the gate can serve as lead and structure complexity is reduced, but the spacer on sidewall of protect gate may be partially etched during contact structure etching, causing high-k layer metal pollution to machine environment and contact plug
Solution Approach 1:
The patent introduces an intermediary protective structure (protect gate with spacer) between the etching process and the high-k layer metal to prevent direct contact and diffusion. The protect gate spacer acts as a barrier that prevents the etching process from exposing the high-k layer metal, thereby eliminating the pollution pathway while maintaining the common contact structure design
Solution Approach 2:
The patent applies preliminary protective measures by forming the protect gate and its spacer before the contact structure etching process. This preliminary structure prevents the harmful etching exposure of high-k layer metal from occurring in the first place, counteracting the potential pollution before it can happen
2Ease of manufacture
If the spacer on sidewall of protect gate is partially etched to form contact structure, then contact plug can be formed, but lanthanum and aluminum materials will diffuse into the contact plug due to easy diffusion property, polluting the contact plug
Solution Approach 1:
The protect gate spacer serves as an intermediary barrier that prevents the diffusion of lanthanum and aluminum materials into the contact plug. By maintaining the integrity of this spacer structure, the patent blocks the diffusion pathway while still allowing contact plug formation to proceed
3Ease of manufacture
If high-k layer metal is exposed during etching process, then contact structure can be formed, but HK layer metal may cause pollution to machine environment and silicon pollution when falling on active area
Solution Approach 1:
The patent implements preliminary protection by forming the protect gate and spacer structure before the contact etching process. This preliminary structure prevents the high-k layer metal from being exposed to the etching process and machine environment, thereby preventing pollution before it can occur
Solution Approach 2:
The protect gate acts as an intermediary protective element that shields the high-k layer metal from the etching process and machine environment. This intermediary structure prevents direct exposure and potential pollution while allowing the contact structure fabrication to proceed
Data Source
AI summary
Embodiments provide a semiconductor structure and a method for fabricating the same. The semiconductor structure includes: a substrate, having a first region and a second region; a first gate structure positioned in the first region and a second gate structure positioned in the second region, the first gate structure being a high dielectric constant gate including a first gate electrode layer and a high dielectric constant layer, and the second gate structure including a second gate electrode layer and an oxide insulating layer; a spacer and an interlayer dielectric layer, positioned on the first gate structure and the second gate structure, the spacer and the interlayer dielectric layer covering a part of the second gate structure, the substrate, and the first gate structure; and a second contact plug, penetrating through the spacer and the interlayer dielectric layer and being in contact with the substrate.


