Semiconductor Gate Control for dv/dt Adjustment

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing semiconductor devices face challenges in adjusting the time change rate (dv/dt) of voltage applied to semiconductor chips during turn-on, which affects controllability and turn-on loss, as reducing dv/dt improves controllability but increases loss, while increasing dv/dt deteriorates controllability and increases loss.

Innovation Solution

A semiconductor device with a first and second switching region, each controlled by a gate electrode, where the control section outputs control signals to adjust the time change rate of voltage applied during turn-on by varying the duration of signal output to the second gate electrode after the initial turn-on, allowing for independent control of channel currents and voltage changes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If the time change rate (dv/dt) of voltage applied to semiconductor chip is reduced to improve controllability, then controllability is improved, but turn-on loss increases

Engineering Contradiction:
ImprovecontrollabilityVSAvoidturn-on loss
Core Design Contradiction:
Ease of operationVSLoss of energy

Solution Approach 1:

The patent divides the gate control into two separate gate electrodes (first gate electrode and second gate electrode) that can be controlled independently. By segmenting the control function, the patent can apply different control strategies to different parts of the switching device, enabling independent optimization of controllability and loss characteristics through separate control signals for each gate electrode

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic control by adjusting the timing and duration of control signals to the second gate electrode based on the switching state. The control section dynamically modifies the control signal parameters (turn-on timing, turn-off timing, pulse width) to optimize the voltage time change rate during turn-on, thereby reducing turn-on loss while maintaining controllability

Inventive Principle:
Principle #15Dynamics

2Loss of energy

If the time change rate (dv/dt) of voltage applied to semiconductor chip is increased to reduce turn-on loss, then turn-on loss is reduced, but controllability deteriorates

Engineering Contradiction:
Improveturn-on lossVSAvoidcontrollability
Core Design Contradiction:
Loss of energyVSEase of operation

Solution Approach 1:

The control section dynamically adjusts the control signal parameters based on real-time switching conditions. By dynamically optimizing the voltage time change rate during turn-on through adjustable control signals to the second gate electrode, the patent reduces turn-on loss while maintaining adequate controllability through adaptive signal modification

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the control parameters (timing, duration, amplitude) of the control signal applied to the second gate electrode to optimize performance. By modifying these parameters, the patent achieves reduced turn-on loss while maintaining controllability through parameter optimization rather than fixed control settings

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables precise adjustment of the time change rate of voltage applied during turn-on, optimizing both controllability and turn-on loss by managing the electric charge supply to the second gate electrode, thereby improving operational efficiency.

Implementation Method 1

a first switching region including a first gate electrode wherein a channel current of the first switching region is controlled according to an electric charge amount supplied by a control signal input to the first gate electrode

Methodology Applied
Scientific EffectElectric charge control: Capacitance

Implementation Method 2

a second switching region including a second gate electrode and connected in parallel with the first switching region wherein a channel current of the second switching region is controlled according to an electric charge amount supplied by a control signal input to the second gate electrode

Methodology Applied
Scientific EffectElectric charge control: Capacitance

Data Source

PatentUS10771053B2Semiconductor device having first and second switching regions respectively controlled by first and second control signals output by a controller
Publication Date: 2020.09.08 MITSUBISHI ELECTRIC CORP
  • US10771053B2 patent drawing
  • US10771053B2 patent drawing
  • US10771053B2 patent drawing

AI summary

First and second switching regions include first and second gate electrodes respectively. Channel currents of the first and second switching regions are controlled according to electric charge amounts supplied by control signals input to the first and second gate electrodes respectively. The second switching region is connected in parallel with the first switching region. A control section outputs a first control signal for turning-on the first switching region to the first gate electrode and a second control signal for turning-on the second switching region to the second gate electrode. The control section stops outputting the second control signal after a first predetermined period elapses from a start of outputting the first and second control signals, and outputs the second control signal after a second predetermined period elapses from a stop of outputting the second control signal.