Semiconductor Gate Electrode Formation Preventing Bird's Beak

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Solution Overview

Problem

The existing manufacturing technologies for semiconductor devices face challenges in forming gate electrodes of MISFETs, leading to issues like bird's beak formation, which affects the thickness control of gate insulating films, reduces read current, and deteriorates short channel characteristics, especially when forming gate electrodes in different steps for MONOS transistors and MISFETs.

Innovation Solution

A manufacturing method where conductor films for both MISFETs are formed prior to processing, allowing for the formation of gate electrodes without subsequent oxidation, thereby preventing bird's beak formation and ensuring reliable gate insulating film thickness, improving data writing and erasing efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If gate electrodes of MONOS transistor and MISFET are formed in different steps, then the manufacturing process can accommodate different voltage requirements, but bird's beak formation occurs affecting gate insulating film thickness control

Engineering Contradiction:
Improvevoltage requirement accommodationVSAvoidgate insulating film thickness control
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

Conductor films for both MONOS transistor and MISFET gate electrodes are formed in advance before any gate insulating film formation steps. This preliminary formation allows subsequent gate insulating films to be deposited uniformly without being affected by pre-existing gate electrode structures, thereby preventing bird's beak formation and ensuring precise thickness control.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The manufacturing process is segmented into distinct phases: first forming all conductor films for both device types, then separately forming gate insulating films for each device type in subsequent steps. This segmentation allows each gate insulating film to be optimized independently without interference from the other device's gate electrode formation.

Inventive Principle:
Principle #1Segmentation

2Ease of manufacture

If gate electrodes are formed before gate insulating films, then the process is simpler, but oxidation during gate insulating film formation causes bird's beak formation

Engineering Contradiction:
Improveprocess simplicityVSAvoidtunnel phenomenon integrity
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

Conductor films are formed preliminarily before gate insulating films, but the actual gate electrode formation is deferred until after gate insulating film deposition. This timing adjustment prevents oxidation during insulating film formation while maintaining process efficiency through the preliminary conductor film formation.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8076192B2Method of manufacturing a semiconductor device
Publication Date: 2011.12.13 RENESAS ELECTRONICS CORP
  • US8076192B2 patent drawing
  • US8076192B2 patent drawing
  • US8076192B2 patent drawing

AI summary

Provided is a manufacturing method of a semiconductor device, which comprises forming a film stack of a gate insulating film, a charge storage film, insulating film, polysilicon film, silicon oxide film, silicon nitride film and cap insulating film over a semiconductor substrate; removing the film stack by photolithography and etching from a low breakdown voltage MISFET formation region and a high breakdown voltage MISFET formation region; forming gate insulating films, polysilicon film and cap insulating film over the semiconductor substrate, forming a gate electrode in the low breakdown voltage MISFET formation region and high breakdown voltage MISFET formation region, and then forming a gate electrode in a memory cell formation region. By the manufacturing technology of a semiconductor device for forming the gate electrodes of a first MISFET and a second MISFET in different steps, the present invention makes it possible to provide the first MISFET and the second MISFET each having improved reliability.