Semiconductor Device Gate Electrode Positioning
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Solution Overview
Problem
Vertical transistors with increased density on a substrate experience slower switching speeds due to narrowed spacing between gate electrodes, leading to reduced operation speed and increased parasitic capacitance, making it difficult to respond to high-speed signals.
Innovation Solution
The semiconductor device design includes a semiconductor layer with first and second channel portions extending in a direction crossing the substrate surface, connected by interconnections and a control electrode positioned between them, which is electrically insulated from the semiconductor layer, thereby reducing parasitic capacitance and maintaining high-speed operation even at increased density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If vertical transistors are placed on the substrate with higher density, then transistor density is improved, but spacing between gate electrodes is narrowed causing increased gate to gate capacitance and slower switching speed
Solution Approach 1:
The gate electrode is repositioned from a vertical configuration (above the channel) to a horizontal configuration (between channel portions along the substrate surface). This dimensional change in gate placement allows for reduced gate-to-gate spacing without increasing parasitic capacitance, enabling higher transistor density while maintaining fast switching speeds.
2Quantity of substance
If spacing between gate electrodes is narrowed to increase density, then transistor density is improved, but gate to gate capacitance increases causing slower switching speed
Solution Approach 1:
The gate electrode is repositioned from a vertical configuration (above the channel) to a horizontal configuration (between channel portions along the substrate surface). This dimensional change in gate placement allows for reduced gate-to-gate spacing without increasing parasitic capacitance, enabling higher transistor density while maintaining fast switching speeds.
3Quantity of substance
If vertical transistors are used for high density placement, then transistor density is improved, but switching speed decreases making it difficult to respond to high speed signals
Solution Approach 1:
The gate electrode is repositioned from a vertical configuration (above the channel) to a horizontal configuration (between channel portions along the substrate surface). This dimensional change in gate placement allows for reduced gate-to-gate spacing without increasing parasitic capacitance, enabling higher transistor density while maintaining fast switching speeds.
Data Source
AI summary
A semiconductor device includes a substrate, a semiconductor layer, a first interconnection, a second interconnection and a control electrode. The semiconductor layer includes a first channel portion and a second channel portion. The first channel portion and the second channel portion extend in a first direction crossing a front surface of the substrate. The first interconnection is connected to one end of the semiconductor layer, and extends in a second direction along the front surface of the substrate. The second interconnection is connected to the other end of the semiconductor layer. The control electrode extends along the front surface of the substrate, and extends in a third direction crossing the second direction. The control electrode includes a portion positioned between the first channel portion and the second channel portion. The control electrode is electrically insulated from the semiconductor layer.