Semiconductor Gate Structure with High-k Dielectric
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Solution Overview
Problem
As MOS transistors scale down, the resistance of the gate increases and leakage current of the gate oxide increases, degrading the performance of metal oxide semiconductor (MOS) transistors, which existing combined structures of poly-silicon gates and silicon oxide cannot effectively address.
Innovation Solution
A method of fabricating semiconductor devices involving the formation of sacrificial gates, spacers, and interlayer insulating films, where a sacrificial insulating layer is formed on exposed sacrificial gates, and subsequent removal to create a trench for a replacement gate structure using high-k dielectric materials to reduce resistance and leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the feature size of MOS transistors is reduced, then the transistor density and integration are improved, but the gate resistance increases and gate oxide leakage current increases
Solution Approach 1:
The patent changes the material parameters of the gate structure by introducing a dual-gate configuration with different materials (poly-silicon and metal) and different thicknesses. The first gate has a first thickness and the second gate has a second thickness greater than the first thickness, allowing optimization of electrical parameters to reduce resistance and leakage current while maintaining small feature sizes for high transistor density.
Solution Approach 2:
The patent employs composite materials in the gate structure by combining poly-silicon and metal materials in a dual-gate configuration. This composite structure leverages the advantages of both materials: poly-silicon provides good interface characteristics with the semiconductor substrate, while metal provides low resistance, thereby solving the contradiction between high transistor density and low gate resistance/leakage current.
2Ease of manufacture
If a combined structure of poly-silicon gate and silicon oxide gate oxide is used, then the manufacturing process is simplified, but the resistance and leakage current of MOS transistors increase
Solution Approach 1:
The patent segments the gate structure into two distinct gates: a first gate made of poly-silicon and a second gate made of metal. This segmentation allows each gate to be optimized for its specific function - the poly-silicon gate for interface quality and the metal gate for low resistance - thereby improving transistor performance without significantly complicating the manufacturing process.
Solution Approach 2:
The dual-gate structure provides multi-functionality by combining the interface benefits of poly-silicon gates with the electrical benefits of metal gates. This universal approach addresses both the manufacturing simplicity requirement and the performance improvement need, making the structure adaptable to various transistor design requirements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces the resistance and leakage current of MOS transistors by forming a replacement gate structure with high-k dielectric materials, improving the performance of semiconductor devices.
Implementation Method 1
A dielectric constant of the spacer is greater than a dielectric constant of the interlayer insulating film
Data Source
AI summary
A method of fabricating a semiconductor device is provided. A sacrificial gate, a hard mask, a spacer and a first interlayer insulating film are formed on a substrate. The hard mask, a part of the spacer, and a part of the first interlayer insulating film are removed to expose an upper portion of the sacrificial gate. A sacrificial insulating layer covers the exposed upper portion of the sacrificial gate. A second interlayer insulating film covers the sacrificial insulating layer, the spacer and the first interlayer insulating film. The sacrificial insulating layer and the second interlayer insulating film are partially removed to expose a top surface of the sacrificial gate. The sacrificial gate and the sacrificial insulating layer are removed to form a trench. A gate structure is formed in the trench.


