Semiconductor device
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Solution Overview
Problem
Existing semiconductor devices face challenges in achieving stable electric characteristics, particularly at high temperatures, which affects their performance in applications like electric vehicles and renewable energy systems.
Innovation Solution
A semiconductor device is designed with a channel layer, a barrier layer having a different energy band gap, a gate electrode, a gate semiconductor layer, and source and drain electrodes that penetrate the barrier and channel layers. The side surfaces of the barrier and channel layers are inclined, with the barrier layer's surface doped with an impurity, to enhance carrier implantation and improve step coverage of the electrodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the side surfaces of the barrier and channel layers are made vertical, then the manufacturing process is simpler, but the electrode step coverage is insufficient and carrier implantation is less effective
Solution Approach 1:
The patent applies the curvature principle by replacing vertical side surfaces with inclined side surfaces having specific angle ranges (first angle α between 0-45 degrees for the barrier layer, second angle β between 0-45 degrees for the channel layer). This curved/angled geometry improves electrode step coverage and carrier implantation effectiveness compared to vertical surfaces, while maintaining manufacturing feasibility through controlled inclination angles.
2Reliability
If the barrier layer is heavily doped to improve carrier implantation, then the electric characteristics improve, but the power loss increases
Solution Approach 1:
The patent applies local quality by doping the barrier layer selectively in specific regions rather than uniformly throughout. The doping concentration is controlled to be higher in regions where carrier implantation is needed (near the inclined surfaces) while maintaining lower doping in other regions to minimize power loss. This localized doping approach improves electric characteristics stability without proportionally increasing overall power loss.
Solution Approach 2:
The patent utilizes parameter changes by precisely controlling the doping concentration and inclination angles as variable parameters. The doping concentration is optimized within specific ranges to achieve the desired balance between carrier implantation effectiveness and power loss. Similarly, the inclination angles (α and β) are adjusted within 0-45 degrees to optimize both electrode step coverage and carrier implantation while managing power loss characteristics.
3Reliability
If the inclination angles are increased to improve carrier implantation, then the electric characteristics improve, but the manufacturing precision becomes more difficult to control
Solution Approach 1:
The patent applies partial action by using moderate inclination angles (0-45 degrees) rather than extreme angles. This partial inclination is sufficient to improve carrier implantation effectiveness and electrode step coverage compared to vertical surfaces, while avoiding the manufacturing difficulties associated with steeper angles. The moderate angle range provides an optimal balance between performance improvement and manufacturing controllability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves the electric characteristics of the semiconductor device by enhancing carrier implantation and electrode step coverage, leading to more stable and efficient performance, even under high-temperature conditions.
Implementation Method 1
a barrier layer on the channel layer and including a material having an energy band gap different from that of the channel layer
Implementation Method 2
a first inclined surface doped with an impurity
Data Source
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AI summary
Various example embodiments provide a semiconductor device including a channel layer (132), a barrier layer (136) on the channel layer and including a material having an energy band gap different from that of the channel layer, a gate electrode (155) on the barrier layer, a gate semiconductor layer (152) between the barrier layer and the gate electrode, and a source electrode (173) and a drain electrode (175) on opposite sides of the gate electrode and penetrating at least a portion of the barrier layer and the channel layer to cover a side surface of the barrier layer and a side surface of the channel layer.