Power Semiconductor Module Gate Inductance Compensation
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Solution Overview
Problem
Wide-band-gap semiconductor modules with many switches connected in parallel face challenges in achieving fast switching behavior and minimizing switching losses due to inductance imbalances and oscillations, which existing designs fail to adequately address.
Innovation Solution
A power semiconductor module design featuring parallel groups of semiconductor switches with a compensation structure in the gate connection path to equalize inductance, reducing oscillations and improving switching performance by artificially increasing the inductance of the connection path between the branching point and gate terminals, and using interconnection bridges with conductive layers and insulation to reduce overall gate inductance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If many semiconductor switches are connected in parallel to achieve higher current rating, then the current capacity increases, but the inductance imbalance and oscillations worsen
Solution Approach 1:
The patent applies local quality by adding compensation inductance specifically to certain gate connection paths that have lower inductance, rather than uniformly increasing inductance across all paths. This localized adjustment equalizes the total inductance across parallel switch groups, reducing oscillations while maintaining fast switching behavior.
Solution Approach 2:
The patent changes the inductance parameter of specific connection paths by adding compensation inductance structures. This modifies the electrical characteristics of the gate connection to achieve balanced inductance values across different parallel switch groups, resolving the oscillation issue without sacrificing switching speed.
2Speed
If wide-band-gap semiconductors are used to achieve fast switching behavior, then the switching speed increases, but the inductance sensitivity and oscillations worsen
Solution Approach 1:
The patent applies preliminary anti-action by pre-calculating and compensating for inductance differences in the gate connection paths before the switching operation. The compensation inductance is designed to counteract the harmful oscillations that would otherwise be generated by the fast switching wide-band-gap semiconductors, allowing them to operate at full speed without excessive oscillations.
3Reliability
If separate substrate metallizations are used for each switch group, then the switching performance improves, but the module area and complexity increase
Solution Approach 1:
The patent merges multiple separate substrate metallizations into a common substrate structure with shared connection paths. By combining the gate connection infrastructure, the module area is reduced while maintaining good switching performance through the carefully designed compensation inductance that equalizes the inductance across all parallel switch groups.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design achieves improved switching behavior with reduced oscillations and power losses, enabling faster switching times and minimizing the need for additional resistors, thus enhancing the performance and production efficiency of the power semiconductor module.
Implementation Method 1
a compensation structure in a connection path between the first branching point and the gate terminals of the semiconductor switches of at least one group for increasing the inductance of said connection path
Data Source
Figure 1~2
Figure 3~4
Figure 5~8
AI summary
The disclosure relates to a power semiconductor module (1) comprising at least two groups (2, 3; 31, 32, 33, 34) of semiconductor switches (4) connected in parallel, the semiconductor switches (4) of each group being connected in parallel within the group (2, 3; 31, 32, 33, 34), a module gate contact (5), a group gate contact (6,7) for each group, a first branching point (8) connected to the module gate contact (5) and to the group gate contacts (6, 7), a gate path between the module gate contact (5) and the first branching point (8) being shared for the at least two groups of semiconductor switches (2, 3; 31, 32, 33, 34), and a compensation structure (9; 39) in a connection path between the first branching point (8) and gate terminals (10) of the semiconductor switches (4) of at least one group (3) of semiconductor switches (4) for increasing the inductance of said connection path.