Semiconductor Gate Insulation Cavity for Parasitic Capacitance Reduction
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Solution Overview
Problem
In semiconductor devices with insulating layers covering gate electrodes or wiring, the addition of a further insulating layer can lead to parasitic capacitance, which deteriorates high-frequency characteristics and is challenging to manage due to the difficulty in removing sacrificial layers with high permittivity materials without leaving residues.
Innovation Solution
A semiconductor device configuration featuring a substrate with a conductor, a first insulating layer having a cavity surrounding the conductor, and a second insulating layer with an opening above the cavity, where the second insulating layer with high permittivity is partially removed to reduce parasitic capacitance, and the cavity is formed using a sacrificial layer decomposition method that improves light transmittance and material porosity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a second insulating layer with high permittivity is provided on the first insulating layer, then the insulation performance is improved, but parasitic capacitance increases and high-frequency characteristics deteriorate
Solution Approach 1:
The second insulating layer is divided into a first region (overlapping the cavity) and a second region (not overlapping the cavity). This segmentation allows different portions of the insulating layer to serve different functions: the first region provides insulation while the second region is removed to reduce parasitic capacitance.
Solution Approach 2:
The second insulating layer is selectively removed only in the first region where it would generate parasitic capacitance, while being maintained in the second region where it provides necessary insulation. This local differentiation optimizes both insulation performance and high-frequency characteristics.
2Ease of manufacture
If a sacrificial layer is used to form the cavity, then the cavity formation is simplified, but residue formation occurs when removing the sacrificial layer
Solution Approach 1:
A porous layer is introduced as the sacrificial material instead of conventional non-porous materials. The porous structure allows decomposition products to escape through the pores during thermal processing, preventing residue formation while maintaining the sacrificial layer's function of defining the cavity shape.
Solution Approach 2:
The physical and chemical parameters of the sacrificial layer are changed by using materials with specific decomposition characteristics and pore structures. This allows the sacrificial layer to be completely removed without residues through controlled thermal decomposition, while still enabling precise cavity formation.
3Reliability
If the insulating layer is made denser to improve moisture resistance, then moisture resistance is improved, but light transmittance decreases and sacrificial layer removal becomes difficult
Solution Approach 1:
The insulating layer is designed with a controlled porous structure that provides both moisture resistance and light transmittance. The pores are sufficiently small to block moisture molecules while being large enough to allow light transmission and decomposition product escape, achieving a balance between protection and processability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces parasitic capacitance, thereby enhancing the high-frequency characteristics of semiconductor devices by preventing residue formation and improving moisture resistance, while allowing for efficient sacrificial layer removal.
Implementation Method 1
improving light transmittance and material porosity
Implementation Method 2
the cavity is formed using a sacrificial layer decomposition method that improves light transmittance
Implementation Method 3
improving light transmittance and material porosity
Implementation Method 4
sacrificial layer decomposition method that improves light transmittance
Implementation Method 5
improving moisture resistance
Implementation Method 6
improving light transmittance and material porosity
Data Source
AI summary
A semiconductor device includes a compound semiconductor layer, a gate electrode, and first and second insulating layers. The first insulating layer covers the gate electrode on the compound semiconductor layer and has a cavity that surrounds the gate electrode. The second insulating layer is provided on the first insulating layer and has an opening at a position corresponding to the cavity. A part of the second insulating layer, which is provided on the first insulating layer that covers the gate electrode, corresponding to the cavity is removed via the opening, so that the generation of parasitic capacitance due to the second insulating layer is suppressed.