Semiconductor Gate Structure With Inter-Gate Insulating Segments
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Solution Overview
Problem
Current semiconductor devices face challenges in improving element performance and reliability, particularly in effectively controlling current and suppressing short channel effects in multi-gate transistors with three-dimensional channels.
Innovation Solution
The semiconductor device incorporates a unique structure with a lower pattern and multiple sheet patterns, featuring a gate structure with inter-gate structures and a gate insulating film that includes both interfacial and high-dielectric constant insulating films, where the thickness of these films varies to optimize current control and reduce leakage currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a multi-gate transistor with three-dimensional channels is used, then current control capability is improved and short channel effect is suppressed, but device complexity increases due to the need for multiple sheet patterns and inter-gate structures
Solution Approach 1:
The gate structure is segmented into multiple inter-gate structures positioned between adjacent sheet patterns, with each inter-gate structure having a thickness different from the main gate structure. This segmentation allows independent optimization of electrical characteristics in different regions while maintaining the overall multi-gate architecture for improved current control and SCE suppression.
Solution Approach 2:
The patent applies local quality by creating regions with different gate insulating film thicknesses - the inter-gate structures have different thicknesses compared to the main gate structure. This enables localized optimization of electrical properties such as leakage current control and threshold voltage adjustment in specific areas without affecting the entire device structure.
2Reliability
If multiple inter-gate structures with different thicknesses are introduced, then electrical characteristics are optimized, but manufacturing precision requirements increase
Solution Approach 1:
The patent applies preliminary action by forming the first gate insulating film in inter-gate structures before forming the second gate insulating film in the main gate structure. This sequential formation process allows each film to be deposited and controlled independently, facilitating precise thickness control and reducing manufacturing complexity despite the multi-layer structure.
Solution Approach 2:
The gate insulating film is divided into separate first and second gate insulating films formed at different stages, enabling independent thickness control for each region. This segmentation simplifies the manufacturing process by allowing each film to be optimized and controlled separately, reducing the overall precision requirements compared to forming a single complex film structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances current control capabilities and suppresses short channel effects, leading to improved performance and reliability of semiconductor devices by effectively managing the thickness of insulating films and their distribution around the gate and source/drain patterns.
Implementation Method 1
a high-dielectric constant insulating film disposed between the interfacial insulating film and the gate electrode
Data Source
AI summary
A semiconductor device includes an active pattern which includes a lower pattern extending in a first direction, and sheet patterns spaced apart from the lower pattern in a second direction perpendicular to an upper surface of the lower pattern, each sheet pattern including an upper surface and a lower surface, a gate structure disposed on the lower pattern and including a gate electrode and a gate insulating film, the gate electrode and the gate insulating film surrounding each sheet pattern, and a source/drain pattern disposed on at least one side of the gate structure. The gate structure includes inter-gate structures that are disposed between the lower pattern and a lowermost sheet pattern and between two sheet patterns, and contacts the source/drain pattern. The gate insulating film includes a horizontal portion with a first thickness, and a first vertical portion with a second thickness different from the first thickness.