Semiconductor Gate Structure for Lower Leakage and Higher Breakdown
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Solution Overview
Problem
Existing semiconductor devices face issues with high leakage current and reduced breakdown voltage due to electric field concentration at the corners of the conductive body, leading to inefficient power conversion.
Innovation Solution
The semiconductor device design includes a conductive body with a lower surface featuring angled surfaces and voids to disperse electric field stress, reducing leakage current and increasing breakdown voltage by optimizing the structure of the insulating part and conductive body.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional conductive body with flat surfaces is used, then the manufacturing process is simple, but electric field concentration occurs at corners leading to high leakage current and reduced breakdown voltage
Solution Approach 1:
The conductive body employs asymmetric angled surfaces instead of symmetric flat surfaces. The first angled surface has a first angle with the bottom surface, while the second angled surface has a second angle, creating intentional asymmetry that prevents electric field concentration at corners and eliminates leakage current paths
Solution Approach 2:
The conductive body replaces sharp corners and flat surfaces with curved angled surfaces. This curvature eliminates the corner effects that cause electric field concentration, smoothly transitioning the electric field distribution and preventing leakage current while maintaining manufacturing feasibility
2Reliability
If the conductive body structure is modified to reduce leakage current, then breakdown voltage increases, but manufacturing complexity increases
Solution Approach 1:
The invention changes the geometric parameters of the conductive body by introducing specific angles (first angle and second angle) for the angled surfaces. These parameter modifications eliminate leakage current while maintaining compatibility with standard manufacturing processes through controlled deposition or etching at defined angles
3Reliability
If angled surfaces are introduced in the conductive body, then electric field strength is reduced and leakage current is suppressed, but manufacturing precision requirements increase
Solution Approach 1:
By defining specific angle parameters for the angled surfaces, the invention transforms a complex geometric problem into a controllable parameter specification. This allows standard manufacturing equipment to achieve the required precision through angle-controlled deposition or etching processes, balancing manufacturing feasibility with electric field optimization
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The angled surfaces and voids in the conductive body effectively reduce electric field strength, suppressing leakage current and enhancing breakdown voltage while maintaining low on-resistance.
Implementation Method 1
The gate electrode is located in the insulating part. The gate electrode faces the second semiconductor region via a gate insulating layer in the second direction
Data Source
AI summary
According to one embodiment, a semiconductor device includes first and second electrodes, first to third semiconductor regions, a conductive body, and a gate electrode. The first semiconductor region is located on the first electrode and electrically connected with the first electrode. The second semiconductor region is located on the first semiconductor region. The third semiconductor region is located on a portion of the second semiconductor region. The conductive body is located in the first semiconductor region with an insulating part interposed. A lower surface of the conductive body includes first and second surfaces. The gate electrode is located in the insulating part. The gate electrode faces the second semiconductor region via a gate insulating layer. The second electrode is located on the second and third semiconductor regions. The second electrode is electrically connected with the second and third semiconductor regions.


