Semiconductor Gate Structure with Localized High-k Dielectric Concentrations
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Solution Overview
Problem
Current semiconductor devices face challenges in scaling and controlling threshold voltages due to limitations in gate structure design and high-k dielectric material concentration, which affect the performance and efficiency of multigate transistors.
Innovation Solution
The semiconductor device incorporates a substrate with multiple active regions and gate structures featuring sequentially stacked high-k dielectric films and metal-containing films with varying concentrations of silicon, allowing for modulation of the work function and threshold voltages by adjusting the concentration of high-k dielectric materials in the gate structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional gate structures with uniform high-k dielectric films are used, then manufacturing process is simple, but threshold voltage control is insufficient and scaling is limited
Solution Approach 1:
The gate structure is divided into multiple segments with different high-k dielectric films having varying concentrations of first and second high-k dielectric materials. Each segment can be independently tailored to achieve different threshold voltages, enabling fine-grained control while managing complexity through modular design
Solution Approach 2:
Different regions of the gate structure are assigned different local compositions of high-k dielectric materials. Specifically, the first high-k dielectric material concentration varies across different gate structures or within different portions of a gate, allowing localized optimization of threshold voltage characteristics for different active regions
2Adaptability or versatility
If high-k dielectric material concentration is increased to improve threshold voltage control, then threshold voltage modulation capability is enhanced, but manufacturing precision requirements increase
Solution Approach 1:
The invention utilizes parameter changes in the concentration of first and second high-k dielectric materials to achieve threshold voltage modulation. By systematically varying these material parameters across different gate structures, the invention achieves versatile threshold voltage control while establishing manufacturable concentration ranges that balance performance with fabrication capabilities
3Productivity
If device scaling is pursued to increase density, then device density is improved, but short channel effects worsen
Solution Approach 1:
The gate structure employs local quality variations in high-k dielectric material concentrations to enhance electrostatic control in scaled devices. By optimizing the material composition locally at the gate level, the invention improves threshold voltage control and suppresses short channel effects, enabling continued device scaling while maintaining reliability
Solution Approach 2:
The gate dielectric employs composite materials consisting of multiple high-k dielectric materials with different concentrations. This composite structure provides superior electrostatic control compared to single-material gates, enabling better short channel effect suppression in scaled devices while maintaining high device density
Data Source
AI summary
A semiconductor device including a substrate; a first and second active region on the substrate; a first recess intersecting with the first active region; a second recess intersecting with the second active region; a gate spacer extending along sidewalls of the first and second recess; a first lower high-k dielectric film in the first recess and including a first high-k dielectric material in a first concentration and a second high-k dielectric material; a second lower high-k dielectric film in the second recess and including the first high-k dielectric material in a second concentration that is greater than the first concentration, and the second high-k dielectric material; a first metal-containing film on the first lower high-k dielectric film and including silicon in a third concentration; and a second metal-containing film on the second lower high-k dielectric film and including silicon in a fourth concentration that is smaller than the third concentration.


