Semiconductor Device Gate Electrode Configuration for Noise Reduction
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Solution Overview
Problem
Semiconductor devices, such as MOSFETs, generate significant noise during switching due to high switching frequencies and capacitance changes, leading to increased switching noise and loss, particularly in devices with super junction structures.
Innovation Solution
The semiconductor device incorporates a specific structure with alternating n− and p− type semiconductor regions and a gate electrode configuration that increases gate-drain capacitance and reduces switching noise by modifying the capacitance characteristics during the transition from ON to OFF states, while maintaining low switching loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If switching frequency is increased to improve power conversion efficiency, then productivity is improved, but switching noise increases due to capacitance changes
Solution Approach 1:
The patent modifies the capacitance characteristics of the semiconductor device by introducing a specific electrode configuration that increases gate-drain capacitance. This parameter change allows the device to operate at high switching frequencies while reducing the noise generated during switching transitions, thereby resolving the contradiction between productivity and harmful factors.
2Object-generated harmful factors
If gate-drain capacitance is increased to reduce switching noise, then switching noise is reduced, but switching loss may increase
Solution Approach 1:
The patent applies local quality by creating a specific electrode structure that concentrates the capacitance increase in the gate-drain region while maintaining optimal characteristics in other parts of the device. This localized modification reduces switching noise without causing excessive switching loss, as the other regions continue to operate efficiently.
Solution Approach 2:
The patent carefully optimizes the gate-drain capacitance parameter to achieve a balance between noise reduction and switching loss. By precisely controlling this parameter through the electrode configuration, the device achieves reduced switching noise while maintaining acceptable switching loss levels.
3Productivity
If super junction structure is used to improve device performance, then power conversion efficiency is improved, but switching noise increases due to capacitance changes
Solution Approach 1:
The patent modifies the capacitance parameters of the super junction structure by introducing an additional electrode that increases gate-drain capacitance. This parameter change compensates for the noise-generating capacitance changes inherent in super junction devices, allowing them to operate at high frequencies with reduced noise.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces switching noise by increasing gate-drain capacitance, thereby lowering switching frequencies and maintaining low switching loss, thus improving the operational efficiency of the semiconductor device.
Implementation Method 1
a gate electrode on the gate insulating portion over the first semiconductor region and a portion of the third semiconductor region
Data Source
AI summary
A semiconductor device includes a first conductivity type first semiconductor region, a second conductivity type second semiconductor region, a second conductivity type third semiconductor region, a first conductivity type fourth semiconductor region, a gate insulating portion, a gate electrode, and first and second electrodes. The first semiconductor region includes first and second portions. The second semiconductor region includes third and fourth portions. The gate electrode is on the gate insulating portion and over the first semiconductor region and a portion of the third semiconductor region. The first electrode is on, and electrically connected to, the fourth semiconductor region. The second electrode is over the first portion, the third portion, and the gate electrode, and spaced from the first electrode.