Semiconductor Gate Stack Oxide Densification
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Solution Overview
Problem
Conventional poly-silicon gates in semiconductor devices face performance issues due to boron penetration and depletion effects, leading to increased effective oxide thickness and gate leakage, which are exacerbated by miniaturization, necessitating a reduction in effective oxide thickness and gate leakage for scaled-down components.
Innovation Solution
An ozone saturated deionized water process is used to form an oxide layer on a substrate, followed by the formation of a dielectric layer and a post dielectric annealing process, which reduces the effective oxide thickness and gate leakage by densifying the dielectric and oxide layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If conventional poly-silicon gate is used, then device structure is simple, but boron penetration and depletion effect increase leading to larger effective oxide thickness and higher gate leakage
Solution Approach 1:
The invention changes the material parameters by replacing conventional poly-silicon gate with work function metals (such as titanium nitride, tantalum nitride, or tungsten) that have different electrical properties. This material substitution fundamentally alters the gate's work function and electrical characteristics, enabling reduced gate leakage while maintaining device functionality.
Solution Approach 2:
The invention employs composite material structures including high-k dielectric layers (such as hafnium oxide, zirconium oxide, or their silicates) combined with metal gate materials. This composite approach combines the high dielectric constant of the insulator with the appropriate work function of the metal, achieving both electrical performance improvement and controlled gate leakage.
2Manufacturing precision
If high-k dielectric layer is deposited to reduce effective oxide thickness, then gate capacitance improves, but material interface quality deteriorates due to material difference between dielectric and substrate
Solution Approach 1:
The invention introduces an intermediary buffer layer (such as silicon oxide or silicon nitride) between the high-k dielectric material and the silicon substrate. This buffer layer serves as a transition medium that improves interface quality, reduces defects, and facilitates better adhesion between the dissimilar materials, thereby stabilizing the interface composition.
Solution Approach 2:
The invention applies different material compositions at different locations within the gate stack. The buffer layer is specifically positioned at the interface region where material mismatch occurs, while the high-k dielectric occupies the bulk region. This localized material differentiation addresses interface quality issues without compromising the overall dielectric performance.
3Area of moving object
If device size is miniaturized, then integration density increases, but effective oxide thickness and gate leakage become difficult to minimize due to process limitations
Solution Approach 1:
The invention fundamentally changes the electrical parameters of the gate structure by using work function metals with optimized work functions and high-k dielectric materials with higher dielectric constants. This allows achieving the required gate capacitance with thinner effective oxide thickness, thereby reducing gate leakage even in miniaturized devices where traditional processes fail.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The process results in a semiconductor structure with a thinner effective oxide thickness and reduced gate leakage, enhancing the electrical performance and scalability of semiconductor components.
Implementation Method 1
An ozone saturated deionized water process is performed to form an oxide layer on the substrate
Implementation Method 2
A post dielectric annealing (PDA) process is performed on the dielectric layer and the oxide layer
Data Source
AI summary
A semiconductor process includes the following steps. A substrate is provided. An ozone saturated deionized water process is performed to form an oxide layer on the substrate. A dielectric layer is formed on the oxide layer. A post dielectric annealing (PDA) process is performed on the dielectric layer and the oxide layer.