Semiconductor Device Gate Pad Segmentation for High Current Screening
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Solution Overview
Problem
Conventional semiconductor devices face challenges in suppressing local current concentration during high current density screening without the use of special inspection devices, often resulting in increased costs and reduced throughput due to the need for multiple probes and complex contact configurations.
Innovation Solution
A semiconductor device design featuring multiple gate wirings and pads that allow for selective input of drive signals to gate pads, enabling the inspection of plural transistor cells at high current density without a special inspection device by partitioning gate electrodes and using a shared first and second pad configuration on the semiconductor substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of probes is increased to increase test current, then the test current increases, but the current concentration is likely to occur due to height variation of the probe and the size of the first pad limits the number of probes
Solution Approach 1:
The invention divides the first pad into multiple regions, with each region capable of receiving a probe. This segmentation allows multiple probes to be arranged on the first pad without excessive current concentration, as the current is distributed across multiple contact points rather than concentrated at a single point
Solution Approach 2:
The invention creates different regions on the first pad with different characteristics. Each region is designed to accommodate probes and distribute current locally, ensuring that no single area bears excessive current density while maintaining overall high current capability
2Quantity of substance
If the current per probe is increased to increase test current, then the test current increases, but a local current concentration caused by contact variation between an inspection device and the pad is more likely to occur
Solution Approach 1:
By dividing the first pad into multiple regions, the invention reduces the current burden on each individual probe contact. This segmentation makes the system less sensitive to contact variation, as the total test current is distributed across multiple probes rather than relying on a single high-current contact
Solution Approach 2:
The invention changes the parameter of current distribution by providing multiple probe contact regions on the first pad. This transforms the current flow from a single concentrated path to multiple distributed paths, reducing the impact of contact variation on current concentration
3Object-affected harmful factors
If a special inspection device with conductive resin is used to suppress current concentration, then the current concentration is suppressed, but the throughput becomes poor and costs increase
Solution Approach 1:
The invention makes the first pad itself serve the dual function of electrical connection and current distribution. By forming multiple regions directly on the first pad, the structure uses its own geometry to suppress current concentration without requiring external special inspection devices or conductive resin
Solution Approach 2:
The invention replaces expensive special inspection devices with a simple structural modification of the first pad. The multiple regions are formed using standard semiconductor fabrication processes, eliminating the need for costly specialized equipment while achieving the same current distribution effect
Data Source
AI summary
A semiconductor device includes a semiconductor substrate on which plural gate electrodes are juxtaposed to each other, plural gate wirings formed on the semiconductor substrate, plural gate pads, a first pad, and a second pad. The adjacent gate electrodes define plural cells, and the plural cells include plural transistor cells. The plural gate electrodes are partitioned into plural types by the plural gate wirings. The plural transistor cells are partitioned into plural types according to a combination of the defined gate electrodes.