Semiconductor Gate Pitch Reduction via Sidewall Image Transfer
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Solution Overview
Problem
Current lithography techniques are limited in forming device patterns with smaller dimensions, particularly for fin-like field effect (FinFET) devices with less than two fins, due to resolution constraints.
Innovation Solution
A method involving sidewall image transfer (SIT) process is used to fabricate semiconductor devices, including forming fin-shaped structures, gate layers, and patterning sacrificial mandrels and spacers to transfer patterns for precise gate structure formation, enabling the creation of gate structures with lower pitch as devices scale down.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional lithography techniques are used, then device patterns can be formed with current resolution limits, but device patterns with smaller dimensions (lower pitch) cannot be achieved
Solution Approach 1:
The fabrication process is divided into multiple stages: first forming sacrificial mandrels, then forming sidewall spacers adjacent to the mandrels, removing the mandrels, and finally using the remaining spacers as masks for gate pattern formation. This segmentation allows each stage to be optimized independently, enabling pitch reduction beyond single-lithography limits
Solution Approach 2:
The invention transitions from two-dimensional planar patterning to three-dimensional sidewall spacer formation. By depositing spacer material on the vertical sidewalls of sacrificial mandrels and then removing the mandrels, the process creates patterns with dimensions determined by spacer thickness rather than lithography resolution, effectively adding a vertical dimension to the patterning process
Data Source
AI summary
A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a first region and a second region defined thereon; forming a plurality of fin-shaped structures on the substrate; forming a gate layer on the fin-shaped structures; forming a material layer on the gate layer; patterning the material layer for forming sacrificial mandrels on the gate layer in the first region; forming sidewall spacers adjacent to the sacrificial mandrels; removing the sacrificial mandrels; forming a patterned mask on the second region; and utilizing the patterned mask and the sidewall spacers to remove part of the gate layer.