Semiconductor Gate Protection Layer Void Prevention

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Solution Overview

Problem

In semiconductor manufacturing, the increased aspect ratio between gate structures during film layer removal processes leads to void and seam formation, causing short circuits during contact formation.

Innovation Solution

A semiconductor structure with a protection layer between gate structures, covering the isolation structure, to prevent void and seam formation, comprising a substrate, isolation structure, gate structures with conductive and dielectric layers, and a protection layer made of silicon nitride or silicon oxynitride, which is formed using a dry etching method to ensure the isolation structure is protected.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-generated harmful factors

If film layers are removed between gates to clean the structure, then the cleaning effect is improved, but the aspect ratio of the space between gate structures increases, leading to void formation

Engineering Contradiction:
Improvecontamination between gatesVSAvoidaspect ratio control
Core Design Contradiction:
Object-generated harmful factorsVSManufacturing precision

Solution Approach 1:

The protection layer is formed on the isolation structure before the film removal process. This preliminary protective measure prevents the isolation structure from being过度 removed during cleaning, thereby controlling the aspect ratio change while still allowing effective contamination removal between gates.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The protection layer acts as an intermediary between the isolation structure and the etching process. It selectively protects the isolation structure during film removal, preventing excessive aspect ratio increase while allowing the necessary cleaning to occur in the spaces between gates.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If the aspect ratio between gate structures is reduced to prevent void formation, then void formation is prevented, but the cleaning effectiveness between gates is compromised

Engineering Contradiction:
Improveaspect ratio controlVSAvoidcontamination between gates
Core Design Contradiction:
Manufacturing precisionVSObject-generated harmful factors

Solution Approach 1:

The protection layer is deposited in advance on the isolation structure, creating a protective barrier before the cleaning process begins. This allows thorough removal of contaminant film layers between gates while the protection layer prevents excessive etching of the isolation structure, thereby maintaining controlled aspect ratio.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The protection layer serves as a mediator that decouples the cleaning process from the isolation structure. It enables effective contamination removal while independently controlling the aspect ratio, resolving the contradiction between cleaning effectiveness and geometric control.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Manufacturing precision

If a protection layer is added to cover the isolation structure, then void formation is prevented, but the device complexity increases

Engineering Contradiction:
Improvevoid preventionVSAvoidstructure layers
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The protection layer is integrated with the existing SAB (Self-Aligned Silicide Block) layer process flow. By combining the protection function with the existing silicide block layer, the design achieves multi-functionality: it protects the isolation structure, controls aspect ratio, and maintains compatibility with subsequent metal silicide formation processes, thereby minimizing additional complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The protection layer is merged with the SAB layer formation process. The same material deposition and patterning steps serve both to create the self-aligned silicide block and to provide protection for the isolation structure, reducing the number of separate process steps and overall device complexity.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10068793B1Semiconductor structure for preventing generation of void and method for manufacturing the same
Publication Date: 2018.09.04 UNITED MICROELECTRONICS CORP
  • US10068793B1 patent drawing
  • US10068793B1 patent drawing
  • US10068793B1 patent drawing

AI summary

A semiconductor structure including a substrate, an isolation structure, a first gate structure, a second gate structure and a protection layer is provided. The isolation structure is disposed on the substrate. The first gate structure and the second gate structure are adjacent to each other and disposed on the isolation structure. Each of the first gate structure and the second gate structure includes a conductive layer. The protection layer is disposed between the first gate structure and the second gate structure and covers the isolation structure between the first gate structure and the second gate structure.