Semiconductor Gate Stack Recess Depth Uniformity
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Solution Overview
Problem
Current semiconductor device fabrication methods face challenges in enhancing device density and controlling current without increasing gate length, particularly in suppressing short channel effects and achieving uniformity in epitaxial patterns across gate electrodes spaced at different distances.
Innovation Solution
A method involving the formation of gate stacks at varying distances with specific blocking films and spacer films to create recesses between gate electrodes, where the thickness of the blocking films and spacer films is tailored to minimize depth differences and ensure uniform epitaxial pattern formation, thereby enhancing device performance and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If gate stacks are formed with different spacing distances in different regions, then device density and current control capability are enhanced, but depth differences between recesses increase
Solution Approach 1:
The patent applies local quality by forming blocking films with different thicknesses in different regions corresponding to different gate stack spacings. In regions with larger gate stack spacing, thicker blocking films are formed, while in regions with smaller spacing, thinner blocking films are formed. This local differentiation compensates for the depth differences that would otherwise occur during recess formation, ensuring uniform recess depths across all regions despite varying gate stack densities.
Solution Approach 2:
The patent implements preliminary action by pre-forming blocking films with region-specific thicknesses before creating the recesses between gate stacks. This preliminary differentiation in blocking film thickness ensures that when recesses are subsequently formed, the varying gate stack spacings do not result in problematic depth differences, as the blocking films have already been tailored to compensate for these variations.
2Manufacturing precision
If blocking films with different thicknesses are formed in different regions, then uniform recess depth is achieved, but process complexity increases
Solution Approach 1:
The patent merges multiple functions into a single blocking film formation step. By using a thickness-controlled deposition process that automatically forms different thicknesses in different regions based on the underlying topography and spacing, the method combines the functions of depth compensation, region differentiation, and recess protection into one integrated process step, thereby reducing overall process complexity despite the varying thickness requirements.
3Reliability
If gate length is increased to control current, then current control capability improves, but device density decreases
Solution Approach 1:
The patent transitions from one-dimensional current control (increasing gate length) to three-dimensional control by forming recesses between gate stacks and implementing multigate structures. This dimensional change allows current control to be achieved through vertical and lateral field effects in the recess regions, enabling effective short channel effect suppression and current control without increasing gate length, thereby maintaining high device density.
Data Source
AI summary
A method for fabricating a semiconductor device includes forming first gate stacks on a first region of a substrate to be spaced apart by a first distance, forming second gate stacks on a second region of the substrate to be spaced apart by a second distance greater than the first distance, forming a first blocking film along the first gate stacks and the substrate, a thickness of the first blocking film between the first gate stacks being a first thickness, forming a second blocking film along the second gate stacks and the substrate, a thickness of the second blocking film between the second gate stacks being a second thickness different from the first thickness, and removing the first blocking film, the second blocking film, and the substrate to form a first recess between the first gate stacks and a second recess between the second gate stacks.