Semiconductor Device Gate Resistance Reduction

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Solution Overview

Problem

Existing semiconductor devices face challenges in maintaining stable operations due to high gate resistance and electric field concentration, leading to increased source-drain parasitic capacitance and switching loss.

Innovation Solution

The semiconductor device incorporates a first extension conductive layer electrically connected to the gate electrode, a field plate, and an insulating member with specific insulating portions to reduce gate resistance and electric field concentration, while maintaining a small device size and surface area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional gate electrode structure is used, then the device structure is simple, but the gate resistance is high leading to unstable operations

Engineering Contradiction:
Improveoperational stabilityVSAvoidelectrode structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The gate electrode is divided into multiple segments (first gate electrode, second gate electrode, third gate electrode) arranged in a triangular configuration. Each segment is independently connected to the gate potential, allowing for distributed current paths that reduce overall gate resistance while maintaining structural organization.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The gate electrode structure transitions from a conventional planar configuration to a three-dimensional triangular arrangement. The gate electrodes are positioned at different lateral positions and connected through vertical conductive paths, utilizing the third dimension (depth/vertical direction) to reduce resistance without increasing surface area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Area of stationary object

If the device size is reduced, then the surface area is minimized, but the electric field concentration increases

Engineering Contradiction:
Improvedevice surface areaVSAvoidelectric field concentration
Core Design Contradiction:
Area of stationary objectVSObject-affected harmful factors

Solution Approach 1:

Insulating portions are selectively positioned at specific locations where electric field concentration occurs (such as at the corners of the triangular gate electrode arrangement). This localized insulation approach addresses the harmful electric field concentration only where needed, without requiring complete device enlargement.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

Insulating portions are introduced as intermediary elements between the gate electrodes and the surrounding environment. These insulating structures mediate the electric field distribution, preventing direct field concentration at critical points while allowing the device to maintain its compact size.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Loss of time

If the gate electrode is extended to reduce resistance, then the gate delay is reduced, but the device area increases

Engineering Contradiction:
Improvegate delayVSAvoiddevice area
Core Design Contradiction:
Loss of timeVSArea of stationary object

Solution Approach 1:

Instead of extending gate electrodes horizontally across the device surface, the structure utilizes vertical conductive paths and three-dimensional positioning. The gate electrodes are connected through conductive layers that extend in the vertical direction, reducing resistance without increasing the lateral device footprint.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

Conductive layers are pre-positioned and structured to provide optimal current paths from the gate electrodes to the active regions. The triangular arrangement and associated conductive structures are designed in advance to minimize resistance before the device operates, ensuring low gate delay without requiring additional surface area.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11043452B2Semiconductor device
Publication Date: 2021.06.22 KK TOSHIBA
  • US11043452B2 patent drawing
  • US11043452B2 patent drawing
  • US11043452B2 patent drawing

AI summary

According to one embodiment, a semiconductor device includes first to fourth electrodes, a semiconductor layer, a first extension conductive layer, first and second electrode connection portions, and an insulating member. The first to fourth electrodes extend along a first direction. The first electrode is between the second and third electrodes in a second direction. The second direction crosses the first direction. The first extension conductive layer extends along the first direction and is electrically connected to the first electrode. The fourth electrode is between the first and third electrodes in the second direction. The first electrode connection portion is electrically connected to the first electrode. The second electrode connection portion is electrically connected to the second and fourth electrodes. The insulating member includes a first insulating portion. The first insulating portion is between the second electrode connection portion and a portion of the first electrode.