Semiconductor Gate Structure with Segmented Silicide Control
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Solution Overview
Problem
Current semiconductor technologies produce metal silicide layers with poor performance and non-uniformity due to varying reacting rates between the metal layer and gate portions, leading to inconsistent contact resistance and transistor performance.
Innovation Solution
A method is developed where a base substrate is formed with gate structures having distinct first and second gate portions, with the second gate portions limiting the height of the metal silicide layer, ensuring a uniform reaction rate and improved uniformity through a controlled annealing process, resulting in consistent metal silicide layer heights and reduced resistance differences.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a metal silicide layer is formed on a gate structure using current technologies, then contact resistance between the gate structure and conductive plug is improved, but the metal silicide layer has poor performance and non-uniformity
Solution Approach 1:
The gate structure is divided into two distinct gate portions: a first gate portion made of silicon and a second gate portion made of silicon germanium. This segmentation allows each portion to have different reacting rates with the metal layer, enabling the second gate portion to limit the height of the metal silicide layer and ensure uniform reaction, while the first gate portion provides good contact resistance. The segmentation resolves the contradiction by assigning different functional roles to different parts of the gate structure.
2Reliability
If the metal layer reacts with gate portions during annealing, then metal silicide layer is formed for improving contact resistance, but the varying reacting rates lead to non-uniform metal silicide layers
Solution Approach 1:
The invention applies local quality by making the second gate portion have different material composition (silicon germanium with higher germanium content) compared to the first gate portion (silicon). This local difference in material quality creates a gradient in reacting rates, where the second gate portion reacts faster and limits the metal silicide layer height, ensuring uniformity. The local quality principle resolves the contradiction by creating spatial variation in reacting rates to achieve both good contact resistance and uniform metal silicide layer formation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method achieves highly uniform metal silicide layers with improved semiconductor structure performance by controlling the reacting rates and ensuring uniformity, enhancing the overall performance of CMOS transistors.
Implementation Method 1
forming a metal silicide layer by reacting a portion of the metal layer with each second gate portion through an annealing process
Implementation Method 2
reacting a portion of the metal layer with each second gate portion through an annealing process
Implementation Method 3
a reaction between the metal layer and the second gate portions has a first reacting rate and a reaction between the metal layer and the first gate portions has a second reacting rate
Data Source
AI summary
A fabrication method for a semiconductor structure is provided. The method includes: forming a base substrate; forming gate structures on the base substrate where each gate structure includes a first gate portion with first doping ions on the base substrate and a second gate portion on the first gate portion; forming a metal layer on the second gate portions; and forming a metal silicide layer by reacting a portion of the metal layer with each second gate portion through an annealing process. When forming the metal silicide layers, a reaction between the metal layer and the second gate portions has a first reacting rate and a reaction between the metal layer and the first gate portions has a second reacting rate; and the second reacting rate is smaller than the first reacting rate.


