Semiconductor Device Gate Voltage Control via Dual Driving Circuits
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Solution Overview
Problem
Existing digital dimming techniques for light emitting elements, such as LEDs, face challenges in achieving accurate control of gate voltage rise and fall times without increasing noise or power consumption, particularly due to the influence of gate-to-source capacitance and the need for enhanced driving circuit capabilities.
Innovation Solution
A semiconductor device configuration that includes a capacitor connected to the gate of a switching transistor, with a first and second driving circuit generating control signals of different potentials to control the transistor's on and off states, allowing for efficient supply of a second control signal via the capacitor, thereby reducing the rise and fall times of the gate voltage without increasing driving ability or power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the driving ability of the driving circuit or the electric current supplying ability of the regulator is increased to shorten the rise time or fall time of the gate voltage, then the rise time or fall time is reduced, but noise or electric power consumption increases
Solution Approach 1:
The driving circuit is divided into two independent driving circuits: a first driving circuit that outputs a first control signal with a first potential, and a second driving circuit that outputs a second control signal with a second potential (lower than the first potential). This segmentation allows each circuit to operate independently with optimized power levels, reducing overall noise and power consumption while achieving fast switching through the combined effect of both signals applied to the gate via the capacitor.
2Measurement precision
If the pulse width of the PWM signal is small, then digital dimming control is achieved, but highly accurate digital dimming cannot be achieved due to error in the pulse width caused by delayed rise time of the gate voltage
Solution Approach 1:
The capacitor connected to the gate of the switching transistor stores electrical energy in advance. When the second driving circuit outputs the second control signal, the capacitor rapidly discharges or charges, providing an immediate voltage change at the gate. This preliminary energy storage enables the gate voltage to respond instantly to control signals, achieving accurate digital dimming control even with small PWM pulse widths without the delay caused by gate-to-source capacitance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables highly accurate digital dimming by shortening the gate voltage rise and fall times of the switching transistor, maintaining low noise and power consumption levels during PWM-driven digital dimming operations.
Implementation Method 1
the transistor including a gate that is connected to one end of a capacitor... a second driving circuit that, in order to control the transistor in an on-state or an off-state, activates or deactivates a second control signal, and outputs the second control signal to the other end of the capacitor
Data Source
AI summary
A semiconductor device of the invention is a semiconductor device that controls a transistor that controls an electric current that flows through a light emitting element, the transistor including a gate that is connected to one end of a capacitor. The semiconductor device includes: a first terminal that is connected to the gate of the transistor and the one end of the capacitor; a second terminal that is connected to the other end of the capacitor; a first driving circuit that outputs a first control signal to the first terminal; and a second driving circuit that, in order to control the transistor in an on-state or an off-state, activates or deactivates a second control signal, and outputs the second control signal to the second terminal, the second control signal having a potential lower than a potential of the first control signal.


