Semiconductor Chip Girder Beam Stress Management
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Solution Overview
Problem
The miniaturization of semiconductor packages through back grinding processes often results in wafer warping and cracking due to stress, which can damage the circuit units and reduce the reliability of semiconductor chips and packages.
Innovation Solution
Incorporating a girder beam within the semiconductor substrate, composed of materials with a higher modulus than silicon, such as tungsten or graphene, to disperse stress and reduce the risk of warping and cracking during the thinning and singulation processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of stationary object
If back grinding process is used to reduce thickness, then volume is reduced, but warping and cracking occur due to stress
Solution Approach 1:
The wafer is divided into functional regions (circuit unit) and structural support regions (peripheral region with girder beams). The girder beams are segmented stress-resistant structures formed in the peripheral region that do not extend under the circuit unit, creating a segmented architecture where different regions serve different purposes: circuit operation and stress management.
Solution Approach 2:
Different regions of the wafer are given different structural properties. The peripheral region contains girder beams with higher stress resistance formed from materials or structures with greater modulus than the silicon substrate, while the main region under the circuit unit maintains standard silicon properties for optimal electronic performance. This local differentiation allows stress management without compromising circuit functionality.
2Length of moving object
If wafer thickness is reduced, then miniaturization is achieved, but stress resistance decreases
Solution Approach 1:
The wafer structure becomes a composite system combining silicon substrate with girder beams formed from materials having higher modulus than silicon (such as tungsten, titanium, or graphene). These composite structural elements are integrated into the peripheral region to provide enhanced mechanical strength and stress resistance, compensating for the reduced overall wafer thickness while maintaining miniaturization benefits.
Data Source
AI summary
A semiconductor chip includes a semiconductor substrate having a front surface, a circuit unit formed within the semiconductor substrate and extending from the front surface into the semiconductor substrate, and a rear surface opposite the front surface, and a girder beam disposed outside of the circuit unit and within the semiconductor substrate.