Semiconductor Control Board GND Loop Suppression
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Solution Overview
Problem
The existing semiconductor devices with power switching elements face malfunctions due to magnetic fields generated during switching, which induce currents in the GND loop on the control board, limiting the flexibility of IC mounting directions and board pattern layouts.
Innovation Solution
Incorporating a GND loop breaking portion, such as a slit, on the control board that traverses between the GND pins of the IC, preventing the formation of a GND loop that crosses magnetic fields, and using a multilayered board with through-holes to stabilize the GND potential, while maintaining the flexibility of IC mounting directions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the control board is arranged with a GND loop to connect GND pins of IC, then the IC is electrically connected to ground potential, but the GND loop crosses magnetic field and induces current causing GND potential variation and IC malfunction
Solution Approach 1:
The GND pattern is divided into multiple separate GND regions that are not electrically connected to each other. Each GND region is connected to individual GND pins of the IC, preventing the formation of a continuous GND loop that would be susceptible to magnetic field induction. This segmentation approach maintains ground connectivity while eliminating the harmful GND loop.
2Object-affected harmful factors
If the GND loop is arranged vertically to the main current direction, then magnetic field induction is prevented, but the IC mounting direction is restricted and board layout flexibility is reduced
Solution Approach 1:
By segmenting the GND pattern into multiple independent regions, the invention eliminates the need for a specific orientation of a continuous GND loop. Each segmented GND region can be independently positioned and connected to corresponding GND pins, allowing flexible IC mounting directions and board layouts without creating a magnetic field-induced GND loop.
3Reliability
If GND pins are provided at both sides of IC and connected to GND pattern, then ground potential is established, but a GND loop is formed that is susceptible to magnetic field induction
Solution Approach 1:
The GND pattern is segmented into multiple separate GND regions, each connected to individual GND pins of the IC. This segmentation prevents the formation of a closed GND loop while maintaining stable ground potential connections at each pin, thereby eliminating induction current generation without compromising ground stability.
Solution Approach 2:
The harmful GND loop is extracted or removed from the circuit design by intentionally preventing the electrical connection between different GND regions. The essential ground potential stability is retained through individual pin connections, while the harmful loop structure is eliminated.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively suppresses GND potential variations and prevents IC malfunctions without restricting the IC mounting direction, ensuring the stability of the semiconductor device's operation and minimizing modifications to existing circuit patterns.
Implementation Method 1
When this GND loop crosses magnetic field occurring at the switching time of the power switching element, induction current is induced in the GND loop
Data Source
AI summary
A semiconductor device that can suppress variation of GND potential of a control board and prevent malfunction of IC without restricting a mounting direction of the IC of the control board is provided. In a power module 10 as a semiconductor device in which an insulating board 31 having a power switching element 24 and a control board 22 having IC 50 for controlling the power switching element 24 are vertically provided in a case body 19, GND pins 61 are provided at both the sides of the IC 50, a GND pattern 51 to which the GND pins 61 of the IC 50 are connected is provided in the control board 22, and a GND loop breaking slit 70 as a breaking portion for breaking a GND loop formed by electrical connection of the IC 50, the GND pins 61 at both the sides of the IC 50 and the GND pattern 51 is provided to the GND pattern 51.