Semiconductor Groove Etching for High Integration Reliability
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Solution Overview
Problem
The increasing aspect ratios and heights of patterns in highly integrated semiconductor devices lead to deteriorated deposition and etching processes, affecting the reliability of these devices.
Innovation Solution
A method of manufacturing semiconductor devices involving the formation of hard mask lines, etching grooves, and filling them with conductive layers, where the top surfaces of the conductive patterns are lower than the substrate surfaces, and a capping insulating layer is used to improve the reliability and integration of the devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If pattern heights and aspect ratios are increased to achieve high integration, then device functionality and integration density are improved, but deposition and etching process dispersion worsens, deteriorating device reliability
Solution Approach 1:
The groove structure is divided into multiple sections with different depth characteristics. The groove depth is designed to be greater at the center than at the edges, creating segmented depth zones that optimize both capacitance (requiring deep grooves) and process control (benefiting from shallower effective etching depths through the etch-back process)
2Quantity of substance
If groove depth is increased to improve capacitor performance, then device capacitance is enhanced, but etching process difficulty and dispersion increase
Solution Approach 1:
The groove structure is preliminarily formed with varying depths (deeper at center, shallower at edges) before the final etching step. This preliminary depth variation is then refined through selective etching and etch-back processes, allowing the groove to achieve optimal depth for capacitance while maintaining etching process control
Solution Approach 2:
Different regions of the groove have different depth characteristics - the center portion has greater depth to maximize capacitance, while the edge portions have reduced depth to facilitate better etching process control and reduce process dispersion
Data Source
AI summary
According to a method of manufacturing a semiconductor device, hard mask lines are formed in parallel in a substrate and the substrate between the hard mask lines is etched to form grooves. A portion of the hard mask line and a portion of the substrate between the grooves are etched. A top surface of the etched portion of the substrate between the grooves is higher than a bottom surface of the groove. A conductive layer is formed to fill the grooves. The conductive layer is etched to form conductive patterns in the grooves, respectively.