Semiconductor Package Groove for Void Discharge
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Solution Overview
Problem
Conventional semiconductor device packages face issues with void formation between the semiconductor chip and the printed circuit board, leading to swelling phenomena that affect the reliability of the package, especially in high-density mounting methods like ball grid array packages.
Innovation Solution
A semiconductor device package design that incorporates a printed circuit board with a groove to partially expose the edge of the semiconductor chip, allowing for the discharge of voids during mounting and using a molding material to seal and prevent swelling, enhancing adhesion and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If a film-type adhesive material is used to adhere the semiconductor chip to the PCB, then the profile of the semiconductor device package is reduced and it is suitable for thin semiconductor wafers, but void formation occurs at the boundary between the semiconductor chip and the PCB causing swelling phenomenon
Solution Approach 1:
The adhesive material is divided into multiple segments: a first adhesive material layer positioned at the boundary between the semiconductor chip and PCB, and a second adhesive material layer positioned between the bonding pads and the PCB. This segmentation allows the first adhesive layer to specifically prevent void formation at the critical boundary area while the second adhesive layer provides overall adhesion, thus resolving the swelling issue without increasing overall profile height.
Solution Approach 2:
Different adhesive materials are applied to different locations: the first adhesive material layer is specifically placed at the boundary region where void formation occurs, while the second adhesive material layer is placed in the bonding pad region. This local differentiation allows each adhesive layer to address specific local requirements, preventing swelling at the boundary while maintaining proper adhesion throughout.
2Volume of moving object
If the semiconductor device package is made lighter, thinner, and smaller, then the profile is reduced and it is suitable for modern applications, but void formation and swelling phenomenon become more common defects
Solution Approach 1:
The adhesive system is segmented into two functional layers: the first adhesive material layer specifically targets the boundary region to prevent void formation, while the second adhesive material layer handles the bonding pad region. This segmentation enables effective void prevention in a compact package structure without requiring additional space or increasing overall package size.
Solution Approach 2:
The first adhesive material layer acts as an intermediary element at the boundary between the semiconductor chip and PCB, specifically preventing void formation in this critical region. This intermediary layer resolves the swelling issue without requiring changes to the overall package dimensions or additional structural elements.
3Strength
If adhesive material is used to mount the semiconductor chip on the PCB, then the chip can be adhered securely, but voids form at the boundary causing delamination and swelling
Solution Approach 1:
The adhesive material is segmented into two distinct layers with different functions: the first adhesive material layer is positioned at the boundary to prevent void formation and delamination, while the second adhesive material layer is positioned under the bonding pads to provide primary adhesion strength. This segmentation allows each layer to optimize its specific function without compromising the other.
Solution Approach 2:
Different adhesive materials are applied to different local regions: the first adhesive material layer is specifically applied at the boundary where void formation occurs, while the second adhesive material layer is applied in the bonding pad region. This local quality differentiation ensures that each region receives the appropriate adhesive properties needed to prevent harmful void formation while maintaining strong adhesion.
Data Source
AI summary
A semiconductor device package includes a semiconductor chip having bonding pads; a printed circuit board (PCB) including an insulation pattern with a groove and bonding electrodes corresponding to the bonding pads, the groove corresponding to the edge of the semiconductor chip and being formed to partially expose a lower portion of the edge of the semiconductor chip; an adhesive material provided for adhering the bottom of the semiconductor chip to the insulation pattern to mount the semiconductor chip on the PCB; bonding wires provided for electrically connecting the bonding electrodes to the corresponding bonding pads; and a molding material provided for sealing the PCB, the semiconductor chip, the adhesive material, and the bonding wires.