Semiconductor Device Guard Ring Contact Layout

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Semiconductor devices face a trade-off between reducing chip size and minimizing contact resistances, as circular-hole contacts increase resistances but elongated-hole contacts require larger chip sizes or wider guard rings.

Innovation Solution

A semiconductor device design featuring a combination of elongated-hole and circular-hole contacts, where elongated-hole contacts are used in the channel width direction and circular-hole contacts in the channel length direction, allowing for reduced layout area without increasing chip size and minimizing contact resistances.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If circular-hole contacts are used for guard ring, then chip size is reduced, but contact resistance to wells increases

Engineering Contradiction:
Improvechip sizeVSAvoidcontact resistance to wells
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent applies different contact shapes to different locations within the guard ring structure. Circular-hole contacts are used in some positions while elongated-hole contacts are used in other positions, allowing each location to be optimized for its specific function while balancing overall chip size and contact resistance requirements

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The guard ring contact structure is divided into multiple segments with different contact shapes. Rather than using a uniform contact shape throughout, the patent segments the contact array into circular-hole and elongated-hole contacts, enabling the system to achieve both compact layout and low contact resistance through the combined effect of different contact types

Inventive Principle:
Principle #1Segmentation

2Reliability

If elongated-hole contacts are used for guard ring, then contact resistance to wells is reduced, but chip size increases

Engineering Contradiction:
Improvecontact resistance to wellsVSAvoidchip size
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

Elongated-hole contacts are strategically placed in specific locations where low contact resistance is most critical, while circular-hole contacts are used in other positions where compactness is prioritized. This localized optimization allows the system to achieve low overall contact resistance without requiring all contacts to be elongated

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The contact array is segmented into different contact shape types, with elongated-hole contacts occupying only a portion of the guard ring positions. This segmentation enables the system to achieve the low contact resistance benefits of elongated contacts while limiting their space-consuming impact on overall chip size

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS9024444B2Semiconductor device
Publication Date: 2015.05.05 KIOXIA CORP
  • US9024444B2 patent drawing
  • US9024444B2 patent drawing
  • US9024444B2 patent drawing

AI summary

In a semiconductor device, a first contact-diffusion-layer is in a first well to be connected to the first well and extends in a channel width direction of a first transistor in a first well. A second contact-diffusion-layer is in the first well so as to be electrically connected to the first well and extends in a channel-length direction of the first transistor. A first contact on the first contact-diffusion-layer has a shape with a diameter in the channel-width direction larger than that in the channel-length direction when viewed from above the substrate. A second contact on the second contact-diffusion-layer has a shape with a diameter in the channel-width direction smaller than that of the first contact and a diameter in the channel-length direction almost equal to that of the first contact when viewed from above the substrate. A wiring is electrically connected to the first transistor through the second contact.