Semiconductor Guard Ring Structure for Depletion Layer Expansion
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Solution Overview
Problem
Conventional semiconductor devices face limitations in achieving high withstand voltage due to restricted diffusion of p-type impurities, leading to inadequate spacing between floating regions and termination trenches, which hampers the expansion of the depletion layer.
Innovation Solution
The semiconductor device incorporates a novel structure with guard ring regions exposed on the front surface, allowing precise control over the spacing between guard rings, enabling the depletion layer to spread widely and enhance withstand voltage. This structure includes a semiconductor substrate with specific regions and trenches, where p-type regions are implanted with Al to form boundary and lateral p-type regions, and guard rings are positioned to expand the depletion layer effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If p-type impurities are implanted into the bottom surface of the termination trench and allowed to diffuse, then the p-type floating region is formed, but the diffusion distance is short causing insufficient spacing reduction between p-type floating regions
Solution Approach 1:
The patent applies preliminary action by forming the p-type region in the termination trench bottom surface before completing other device structures. This allows the p-type impurities to be pre-positioned and then diffuse effectively when needed, ensuring proper spacing between p-type floating regions while maintaining withstand voltage. The preliminary formation of this region enables subsequent depletion layer expansion without being constrained by later processing steps.
2Manufacturing precision
If the spacing between termination trenches is narrowed to reduce spacing between p-type floating regions, then spacing is reduced, but processing accuracy limitations prevent sufficient narrowing
Solution Approach 1:
The patent applies local quality by creating a p-type region specifically at the bottom surface of the termination trench, rather than relying on overall trench spacing reduction. This localized doping approach allows the p-type floating regions to be properly spaced and formed without requiring the entire termination trench structure to be compressed, thus avoiding processing accuracy issues while achieving the desired spacing reduction between functional regions.
3Device complexity
If conventional termination trench structure is used, then simple structure is maintained, but withstand voltage improvement is limited
Solution Approach 1:
The patent applies parameter changes by modifying the electrical properties (doping type and concentration) of the termination trench bottom surface region. By changing this local parameter to create a p-type region, the device achieves enhanced withstand voltage capability without fundamentally altering the overall termination trench structure or adding complex multi-layer configurations, thus maintaining structural simplicity while improving performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed structure ensures high withstand voltage by promoting the expansion of the depletion layer through guard rings, allowing for precise control over spacing and improved processing accuracy, thereby overcoming the limitations of conventional designs.
Implementation Method 1
When the MOSFET is turned off, a depletion layer extends from a body region of the MOSFET toward an outer circumferential side
Implementation Method 2
initially forming the termination trench, and then implanting p-type impurities into the bottom surface of the termination trench, and afterwards allowing the p-type impurities thus implanted to diffuse in the semiconductor layer
Data Source
AI summary
A semiconductor device provided herein includes: a fourth region of a p-type being in contact with a lower end of the gate trench; a termination trench provided in the front surface in a range outside the second region; a lower end p-type region of the p-type being in contact with a lower end of the termination trench; a lateral p-type region of the p-type being in contact with a lateral surface of the termination trench on an outer circumferential side, connected to the lower end p-type region, and exposed on the front surface; and a plurality of guard ring regions provided on the outer circumferential side with respect to the lateral p-type region and exposed on the front surface.