Semiconductor Guard Ring and Polysilicon Field Plate Design
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Solution Overview
Problem
Conventional semiconductor devices face a trade-off between ON resistance and breakdown voltage, with techniques like p-type guard rings requiring additional manufacturing steps that increase costs and misalignment issues, affecting electric field relaxation and robustness against induced charges.
Innovation Solution
A semiconductor device with a peripheral region featuring guard rings and polysilicon field plates in a ring shape, where the polysilicon connection regions extend to a contact hole on the guard ring, allowing electrical connection without additional photolithography or ion implantation steps, reducing the width of the peripheral region and maintaining high breakdown voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If p-type guard rings are formed before forming polysilicon field plates, then electric field relaxation and robustness against induced charges are improved, but manufacturing complexity and cost increase due to additional photolithography and ion implantation steps
Solution Approach 1:
The p-type guard rings are formed preliminarily in the semiconductor substrate before the polysilicon layer is deposited. This preliminary formation allows the guard rings to be ready in advance, and subsequent polysilicon field plates are formed directly on top of them through a single photolithography step, eliminating the need for separate ion implantation steps later.
Solution Approach 2:
The formation of p-type guard rings and polysilicon field plates is merged into a single manufacturing sequence. The guard rings are formed first, then the polysilicon layer is deposited and patterned in one continuous process flow, combining what would otherwise be separate fabrication steps into one integrated operation.
2Ease of manufacture
If p-type guard rings are formed after forming polysilicon gate and field plates, then manufacturing sequence is simplified, but misalignment occurs between guard rings and field plates degrading electric field relaxation performance
Solution Approach 1:
The p-type guard rings are formed preliminarily in the semiconductor substrate before the polysilicon layer is deposited. This preliminary formation allows the guard rings to be ready in advance, and subsequent polysilicon field plates are formed directly on top of them through a single photolithography step, eliminating the need for separate ion implantation steps later.
Solution Approach 2:
The polysilicon layer acts as an intermediary that bridges the p-type guard rings and the final field plate structure. By forming the polysilicon layer over the pre-formed guard rings and then patterning it, the alignment is automatically ensured without requiring separate positioning steps.
3Area of stationary object
If the peripheral region width is reduced to expand active region area, then chip size is reduced, but electric field relaxation and robustness against induced charges are degraded
Solution Approach 1:
The p-type guard rings are formed with different characteristics in different regions: in the straight sections, they provide basic field relaxation, while in the curved sections, they are positioned to work synergistically with the polysilicon field plates for enhanced robustness against induced charges. This localized differentiation allows optimized performance in each region within a compact footprint.
Solution Approach 2:
The peripheral region uses a composite structure combining p-type guard rings (semiconductor material) with polysilicon field plates (different material) to achieve both electric field relaxation and robustness against induced charges in a narrow width, allowing the active region area to be maximized.
Data Source
AI summary
A semiconductor device is provided with a peripheral region that has a narrow width and exhibits good electric field relaxation and high robustness against induced charges. The device has an active region for main current flow and a peripheral region surrounding the active region on a principal surface of a semiconductor substrate of a first conductivity type. The peripheral region has a guard ring of a second conductivity type composed of straight sections and curved sections connecting the straight sections formed in a region of the principal surface surrounding the active region, and a pair of polysilicon field plates in a ring shape formed separately on inner and outer circumferential sides of the guard ring. The surface of the guard ring and the pair of polysilicon field plates of the inner circumferential side and the outer circumferential side are electrically connected with a metal film in the curved section.