Semiconductor Patterning With Halogen Gas Trim for Low LER
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Solution Overview
Problem
Current semiconductor manufacturing techniques face challenges in achieving low line edge roughness (LER) and local critical dimension uniformity (LCDU) at sub-10 nm nodes, particularly with extreme ultraviolet (EUV) lithography, which leads to increased line-break and bridging defects due to stochastic effects and resist thickness fluctuations.
Innovation Solution
A method involving a gaseous etch process using an un-ionized gas containing a halogen compound to trim and descum a metal-based resist (MBR) layer, reducing linewidth and minimizing resist damage, thereby improving LER and LCDU, and using the treated MBR layer as a masking layer for pattern transfer etching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If EUV lithography is used to print higher resolution minimum pitch features, then manufacturing precision is improved, but line edge roughness and local critical dimension uniformity deteriorate due to stochastic effects and resist thickness fluctuations
Solution Approach 1:
The patent applies preliminary action by performing a gas-phase halogenation treatment on the patterned MBR layer before the pattern transfer etch. This pre-treatment modifies the resist surface chemistry to reduce stochastic effects and minimize linewidth variations, thereby improving LER and LCDU while maintaining the high resolution enabled by EUV lithography
Solution Approach 2:
The patent changes the chemical state of the MBR layer by exposing it to un-ionized halogen-containing gas, which chemically reacts with the metal-based resist material. This parameter change in the resist chemistry reduces the impact of stochastic effects and thickness fluctuations, leading to improved line edge roughness and critical dimension uniformity
2Manufacturing precision
If multiple patterning techniques are used to achieve higher packing density, then manufacturing precision is improved, but device complexity increases due to higher mask count and masking steps
Solution Approach 1:
The patent changes the chemical properties of the MBR layer through gas-phase halogenation, which enhances the resist's etch resistance and pattern fidelity. This allows for more effective utilization of each patterning step, potentially reducing the number of masking steps required to achieve target packing densities
3Ease of manufacture
If photolithography with 193 nm optics is used for patterning, then ease of manufacture is maintained, but manufacturing precision deteriorates at sub-10 nm nodes due to wavelength limitations
Solution Approach 1:
The patent changes the chemical composition and surface properties of the metal-based resist layer through halogenation treatment, which enhances its performance characteristics. This allows the resist to achieve better pattern fidelity and reduced LER when used with EUV lithography, improving manufacturing precision at sub-10 nm nodes while maintaining processability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively reduces line edge roughness and line-break defects, enhancing the reliability and performance of semiconductor devices by maintaining a stable resist pattern and minimizing resist damage during the etching process.
Implementation Method 1
flowing an un-ionized gas over the substrate, the gas including a halogen compound, where flowing the gas causes the MBR layer to chemically react with the halogen compound
Implementation Method 2
with a gaseous etch process, trimming the first patterned layer to form a second patterned layer, the gaseous etch process including exposing the first patterned layer to an un-ionized gas including a halogen compound
Data Source
AI summary
A method of forming a semiconductor device, where the method includes receiving a substrate in a processing chamber, the substrate including a first patterned layer including a metal-based material; and with a gaseous etch process, trimming the first patterned layer to form a second patterned layer, the gaseous etch process including exposing the first patterned layer to an un-ionized gas including a halogen compound.


