Semiconductor Heat Dissipation Layer for Dense Backside Power Dies

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Solution Overview

Problem

As semiconductor devices continue to shrink in feature size, they face challenges in heat dissipation and integration density, leading to performance and reliability issues due to increased thermal resistance and power delivery inefficiencies.

Innovation Solution

The implementation of high thermal conductivity materials, such as diamond-like-carbon (DLC), on a support substrate attached to the front-side interconnect structure of integrated circuit dies, which improves heat spreading and reduces thermal resistance by up to 1.33°C/W, enhancing chip performance and reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If minimum feature size is reduced to improve integration density, then more components can be integrated into a given area, but thermal resistance increases and heat dissipation becomes more difficult

Engineering Contradiction:
Improveintegration densityVSAvoidthermal resistance
Core Design Contradiction:
Quantity of substanceVSTemperature

Solution Approach 1:

The patent introduces a heat dissipation layer as an intermediary component between the semiconductor die and the ambient environment. This layer, made of high thermal conductivity material, acts as a thermal mediator that facilitates heat transfer from the densely integrated circuit components to the external environment, thereby resolving the thermal resistance issue caused by high integration density.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent employs composite material structures, specifically using heat dissipation layers composed of high thermal conductivity materials (such as diamond-like carbon or other thermally conductive substances) integrated with the semiconductor device. This composite approach combines the electrical functionality of the semiconductor components with the thermal management capabilities of the high-kappa material layer.

Inventive Principle:
Principle #40Composite materials

2Temperature

If high thermal conductivity materials are embedded to improve heat dissipation, then thermal resistance is reduced, but device complexity increases

Engineering Contradiction:
Improveheat dissipationVSAvoidstructural complexity
Core Design Contradiction:
TemperatureVSDevice complexity

Solution Approach 1:

The heat dissipation layer serves multiple functions simultaneously: it provides thermal management by conducting heat away from the semiconductor components, and it can also serve as part of the interconnect structure or packaging layer. This multi-functionality reduces the need for separate dedicated heat sinking components, thereby limiting the increase in device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution effectively addresses heat dissipation and power delivery inefficiencies by embedding high-kappa materials, improving thermal management and overall performance of integrated circuit dies with backside power structures.

Implementation Method 1

one or more heat dissipation layers formed on the support substrate. The heat dissipation layers may be made of a high thermal conductivity material

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS20240274485A1Heat dissipation in semiconductor devices
Publication Date: 2024.08.15 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240274485A1 patent drawing
  • US20240274485A1 patent drawing
  • US20240274485A1 patent drawing

AI summary

A device includes a device layer comprising a first transistor; a first interconnect structure on a front-side of the device layer, and a second interconnect structure on a backside of the device layer. The second interconnect structure includes a power rail. The device further includes a carrier substrate bonded to the first interconnect structure and a first heat dissipation layer contacting the carrier substrate.