Semiconductor Device Heavy Metal Diffusion for Forward Voltage
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Solution Overview
Problem
Conventional semiconductor devices face challenges in lowering forward drop voltage and shortening reverse recovery time while maintaining high reverse withstand voltage and low leak current, as reducing the area of p+ type diffusion regions or increasing n-type impurity concentration in the n- type semiconductor layer can lead to reduced reverse withstand voltage and increased leak current.
Innovation Solution
A semiconductor device structure where heavy metal is diffused to maximize concentration at the surface of the second semiconductor layer, forming a JBS structure with a barrier metal layer on the surface of the second semiconductor layer and high concentration diffusion regions, allowing for effective pinching off of the depletion layer and reducing carrier extinction speed near the surface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the area of p+ type diffusion regions is decreased or n-type impurity concentration is increased to lower forward drop voltage and shorten reverse recovery time, then forward drop voltage is reduced and reverse recovery time is shortened, but reverse withstand voltage is reduced and leak current is increased
Solution Approach 1:
The patent applies local quality by creating a non-uniform distribution of heavy metal atoms within the semiconductor layer. The heavy metal concentration is highest at the surface and decreases with depth, forming localized regions with different electrical characteristics. This allows the surface regions to have low carrier extinction speed (improving reverse withstand voltage) while bulk regions maintain appropriate switching characteristics.
Solution Approach 2:
The patent changes the parameter of carrier extinction speed by introducing heavy metal atoms with varying concentrations at different depths. By controlling the heavy metal distribution profile (highest concentration at surface, decreasing toward bulk), the carrier extinction speed is modulated spatially - slower at the surface to maintain reverse withstand voltage, and faster in bulk to enable efficient switching.
2Power
If the area of p+ type diffusion regions is decreased or n-type impurity concentration is increased to lower forward drop voltage and shorten reverse recovery time, then forward drop voltage is reduced and reverse recovery time is shortened, but leak current is increased
Solution Approach 1:
The patent applies local quality by creating a non-uniform distribution of heavy metal atoms within the semiconductor layer. The heavy metal concentration is highest at the surface and decreases with depth, forming localized regions with different electrical characteristics. This allows the surface regions to have low carrier extinction speed (improving reverse withstand voltage) while bulk regions maintain appropriate switching characteristics.
Solution Approach 2:
The patent changes the parameter of carrier extinction speed by introducing heavy metal atoms with varying concentrations at different depths. By controlling the heavy metal distribution profile (highest concentration at surface, decreasing toward bulk), the carrier extinction speed is modulated spatially - slower at the surface to maintain reverse withstand voltage, and faster in bulk to enable efficient switching.
3Reliability
If heavy metal concentration is maximized at the surface of the second semiconductor layer, then carrier extinction speed is reduced near the surface improving reverse withstand voltage, but switching speed may be affected
Solution Approach 1:
The patent applies local quality by creating a non-uniform distribution of heavy metal atoms within the semiconductor layer. The heavy metal concentration is highest at the surface and decreases with depth, forming localized regions with different electrical characteristics. This allows the surface regions to have low carrier extinction speed (improving reverse withstand voltage) while bulk regions maintain appropriate switching characteristics.
Solution Approach 2:
The patent resolves the speed conflict by transitioning from a uniform to a spatially varying heavy metal distribution. By controlling the concentration gradient in the depth dimension (highest at surface, decreasing toward bulk), the device achieves different carrier extinction speeds at different locations - slow at surface for high reverse withstand voltage, fast in bulk for quick switching.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables lower forward drop voltage and shorter reverse recovery time while maintaining high reverse withstand voltage and low leak current, along with improved soft recovery characteristics by controlling carrier extinction speed and reducing noise during switching off.
Implementation Method 1
a concentration distribution in which a concentration of heavy metal atoms becomes higher as a position in the n-type semiconductor layer approaches a surface
Data Source
Figure 1A~1C
Figure 2A~2B
Figure 3A~3D
AI summary
The semiconductor device 100 of the present invention includes: a semiconductor base body 110 having an n+-type semiconductor layer 112 and an n--type semiconductor layer 114; p+-type diffusion regions 120 selectively formed on a surface of the n--type semiconductor layer 114; and a barrier metal layer 130 formed on a surface of the n--type semiconductor layer 114 and surfaces of p+-type diffusion regions 120, forming a Schottky junction between the barrier metal layer 130 and the n--type semiconductor layer 114, and forming an ohmic junction between the barrier metal layer 130 and the p+-type diffusion regions 120, wherein platinum which is heavy metal is diffused into the semiconductor base body 110 such that a concentration of platinum becomes maximum in a surface of the n--type semiconductor layer 114. The semiconductor device 100 of the present invention can lower a forward drop voltage VF or can shorten a reverse recovery time trr while maintaining a high reverse withstand voltage VR and a low leak current IR. Further, the semiconductor device 100 of the present invention can acquire an excellent soft recovery characteristic.