Semiconductor Structure Integrating High and Low Voltage MOS Devices
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Solution Overview
Problem
Conventional semiconductor structures face challenges in integrating low-voltage and high-voltage MOS devices due to incompatibility, requiring separate integrated circuits and complex doping concentration changes, which are costly and difficult to modify for different driving voltages.
Innovation Solution
A semiconductor structure and method that includes a high-voltage MOS device region with a well, light-doping region, and heavy-doping regions, where the conductive types are oppositely aligned, allowing for a channel region formation without altering doping concentrations or photo masks, enabling easy adjustment of driving voltage by modifying the gate stack's spacer thickness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate integrated circuits are provided for low-voltage and high-voltage devices, then device functionality is achieved, but integration density is reduced and fabrication costs increase
Solution Approach 1:
The patent combines both low-voltage and high-voltage MOS devices on a single semiconductor substrate by creating distinct device regions with appropriate doping configurations. The low-voltage device region and high-voltage device region are formed on the same substrate, merging previously separate circuits into one integrated structure, thereby increasing integration density while maintaining device functionality.
2Reliability
If doping concentrations are changed to accommodate different driving voltages, then device performance is optimized, but manufacturing complexity and cost increase
Solution Approach 1:
The patent applies different doping concentrations locally to different device regions on the same substrate. The low-voltage device region has doping concentrations optimized for low-voltage operation, while the high-voltage device region has doping concentrations optimized for high-voltage operation. This local differentiation allows each device type to achieve optimal performance without requiring global changes to the entire substrate, thereby managing manufacturing complexity.
Solution Approach 2:
The semiconductor substrate is segmented into distinct low-voltage device regions and high-voltage device regions, each with its own optimized doping concentration profile. This segmentation allows independent optimization of each region's electrical characteristics for its specific voltage requirement, enabling performance optimization without requiring redesign of the entire device structure.
3Stability of the object's composition
If conventional structures are designed for specific high and low voltages, then device performance is stable, but adaptability to different driving voltages is reduced
Solution Approach 1:
The patent creates a universal semiconductor substrate structure that can accommodate multiple device types operating at different voltages. By forming both low-voltage and high-voltage device regions on the same substrate with appropriate doping configurations, the structure becomes multi-functional and adaptable to different driving voltage requirements without requiring separate dedicated structures for each voltage level.
Data Source
AI summary
A semiconductor structure is provided, which includes a first high-voltage MOS device region having a first well and a first light-doping region in a part of the first well, wherein the conductive type of the first well and the conductive type of the first light-doping region are opposite. The first high-voltage MOS device region also includes a first gate stack on a part of the first well and a part of the first light-doping region, and first heavy-doping regions in the first well and the first light-doping region at two sides of the gate stack, wherein the conductive type of the first heavy-doping region and the conductive type of the first well are the same. The first light-doping region between the first well and the first heavy-doping regions is a channel region of the first high-voltage MOS device region.