Semiconductor Hole Formation via Multi-Directional Mask Etching

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Solution Overview

Problem

As semiconductor devices integrate more densely, the challenge of fabricating precise structures with holes becomes increasingly complex due to limitations in existing manufacturing processes, which struggle to achieve the required precision and accuracy for higher data processing demands.

Innovation Solution

A method involving sequential layer formation and etching processes using hardmask patterns and material layers, including carbon-containing layers and titanium nitride, to create targeted holes in semiconductor devices, allowing for precise control over hole formation and integration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If existing manufacturing processes are used, then production is simpler, but manufacturing precision deteriorates

Engineering Contradiction:
Improvehole formation precisionVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The manufacturing process is divided into multiple sequential steps: forming first material layer patterns, forming second material layer patterns, forming third material layer patterns, and finally forming holes. Each step uses different mask patterns and etching conditions, breaking down the complex task of precise hole formation into manageable segments that can be controlled independently.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention introduces multiple horizontal directions (first, second, and third horizontal directions) for forming mask patterns at different stages. By utilizing different spatial dimensions and orientations, the process achieves precise hole formation control that cannot be obtained with single-direction patterning, effectively adding dimensional complexity to solve the precision problem.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If integration density increases, then device performance improves, but manufacturing precision deteriorates

Engineering Contradiction:
Improveintegration densityVSAvoidhole formation precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

Multiple mask patterns (first, second, and third material layer patterns) are formed in advance before the actual hole formation step. Each mask pattern is carefully positioned and structured to guide the subsequent etching process. This preliminary patterning ensures that even as integration density increases, the hole formation precision is maintained because the masks are pre-configured with the exact geometry needed for high-density structures.

Inventive Principle:
Principle #10Preliminary action

3Manufacturing precision

If process complexity increases, then manufacturing precision improves, but production time increases

Engineering Contradiction:
Improvehole formation precisionVSAvoidproduction time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

Multiple functions are merged into the sequential patterning process: the first, second, and third material layer patterns serve both as alignment references and as etch masks for subsequent steps. The process combines positioning, patterning, and protection functions into a unified multi-step approach, reducing the need for separate operations and minimizing overall production time while maintaining high precision.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enables the fabrication of semiconductor devices with precise hole structures, enhancing integration density and performance by ensuring accurate and efficient hole formation, even in complex geometries, thus addressing the challenges of increased integration.

Implementation Method 1

forming a first material layer pattern by etching the first material layer using the plurality of hardmask patterns and the plurality of second material layer patterns as etch masks; and forming a target layer pattern with a plurality of holes by etching the target layer using the first material layer pattern as an etch mask

Methodology Applied
Scientific EffectChemical etching: Chemical Bonding

Data Source

PatentUS9054051B2Method of fabricating semiconductor device
Publication Date: 2015.06.09 SAMSUNG ELECTRONICS CO LTD
  • US9054051B2 patent drawing
  • US9054051B2 patent drawing
  • US9054051B2 patent drawing

AI summary

In a method of fabricating a semiconductor device, a target layer and a first material layer are sequentially formed on a substrate. A plurality of second material layer patterns are formed on the first material layer, the second material layer patterns extending in a first horizontal direction. A plurality of hardmask patterns extending in a second horizontal direction are formed on the plurality of second material layer patterns and the first material layer, wherein the second horizontal direction is different from the first horizontal direction. A first material layer pattern is formed by etching the first material layer using the plurality of hardmask patterns and the plurality of second material layer patterns as etch masks. A target layer pattern with a plurality of holes is formed by etching the target layer using the first material layer pattern as an etch mask.