Semiconductor Housing Electrode Grooves for Thermal Warpage Control
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Solution Overview
Problem
Pressure-contact power semiconductor devices face challenges in maintaining uniform contact pressure distribution across semiconductor chips due to thermal warpage of housing electrodes, leading to current imbalances and reduced reliability.
Innovation Solution
Incorporating grooves on the surface of housing electrodes that split them into separate regions, reducing thermal warpage and maintaining low thermal and electrical resistances, thereby ensuring uniform pressure distribution across semiconductor units.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If cooling devices are mechanically pressed against housing electrodes to remove heat, then heat removal efficiency is improved, but thermal warpage of electrodes increases causing pressure imbalance
Solution Approach 1:
The housing electrode is segmented into multiple independent electrode segments along the thermal gradient direction. Each segment can independently deform due to thermal expansion without causing warpage of the entire electrode structure. This segmentation allows the electrode to accommodate thermal stresses while maintaining uniform contact pressure on the semiconductor chips.
2Strength
If electrode thickness is increased to maintain structural integrity, then mechanical strength is improved, but thermal warpage increases due to larger temperature gradients
Solution Approach 1:
The thick electrode is divided into multiple thinner electrode segments arranged in series along the thermal gradient direction. Each segment has reduced thickness compared to the original single electrode, which reduces the temperature gradient across each segment and minimizes thermal warpage. The segments are connected to maintain electrical continuity while allowing independent thermal deformation.
3Reliability
If pressure is increased on semiconductor chips to improve electrical contact, then contact resistance is reduced, but thermal stress concentration increases leading to chip failure
Solution Approach 1:
The contact interface is segmented into multiple contact regions corresponding to different electrode segments. This distributes the clamping force across multiple smaller contact areas rather than concentrating it on a single large contact area. The segmentation allows for more uniform pressure distribution and reduces stress concentration on individual chips while maintaining adequate electrical contact.
4Temperature
If electrode material with high thermal conductivity is used, then heat removal is improved, but thermal warpage increases due to rapid heat transfer
Solution Approach 1:
The high thermal conductivity electrode material is segmented into multiple sections along the heat flow path. Each segment can expand or contract independently in response to thermal loading, preventing the accumulation of thermal stresses that would cause warpage. The segmentation maintains efficient heat transfer while accommodating thermal deformation through independent segment movement.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces thermal warpage and improves the uniformity of contact pressures, enhancing the reliability and performance of semiconductor devices by optimizing stress sharing between semiconductor units.
Implementation Method 1
thermal warpage of the electrodes 104, 105... The temperature gradients lead to differential thermal expansions through the bodies of the housing electrodes 104, 105, causing them to warp
Implementation Method 2
heat is generated in the semiconductor chips 120... cooling devices (e.g., water-cooled heat sinks) are mechanically pressed against external surfaces of the housing electrodes 104, 105 to remove heat from the device 100
Implementation Method 3
The semiconductor chips 120 are electrically and thermally connected between the upper and lower electrodes 104, 105 by pressure... the interface between the semiconductor units 130 and the upper electrode 104, and the interface between the semiconductor units 130 and the lower electrode 105 are dry interfaces
Data Source
AI summary
There is provided a semiconductor device 1, comprising: a housing comprising a first housing electrode 4 and a second housing electrode 5 arranged at opposite sides of the housing; and a plurality of semiconductor units 30 arranged within the housing between the first and second housing electrodes 4, 5 and coupled to at least one of the first and second housing electrodes 4, 5 by pressure, wherein the plurality of semiconductor units 30 comprise a first semiconductor unit 30-1 and a second semiconductor unit 30-2 neighbouring the first semiconductor unit 30-1; wherein the first and/or second housing electrode comprises a plurality of pillars 10, and the plurality of pillars comprise a first pillar 10-1 and a second pillar 10-2 electrically coupled to the first and second semiconductor units 30-1, 30-2, respectively, and wherein a surface 16 of the first housing electrode 4 comprises a groove 15, and a width W1 of the groove 15 is less than a spacing S2 between the first pillar 10-1 and the second pillar 10-2.