Semiconductor IC Corner Non-Wiring Region Thermal Stress
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Solution Overview
Problem
Conventional semiconductor integrated circuit devices face reliability issues and reduced yields due to thermal stress-induced cracks in the passivation layer during temperature cycle tests, particularly in elongate chips like display drivers and sensors, as existing solutions either require additional processing steps or do not effectively prevent crack development.
Innovation Solution
A semiconductor integrated circuit device design featuring a corner non-wiring region without metal wiring in the corners and a multilayer passivation structure with a softer first layer to disperse thermal stress, along with slits in the metal wiring layer and optimized circuit layout to minimize thermal expansion coefficient differences and reduce crack formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a metal wiring layer and passivation layer have elevations and depressions formed thereon to disperse thermal stress, then crack prevention in the passivation layer is improved, but the device complexity and manufacturing process complexity increase due to requiring extra processes
Solution Approach 1:
The invention extracts the problematic metal wiring layer from the corner region of the semiconductor substrate, creating a corner non-wiring region. This removes the source of thermal stress concentration at the corners, thereby preventing crack formation in the passivation layer without requiring complex elevation and depression structures. The corner non-wiring region eliminates the need for additional stress-dispersing structural features.
Solution Approach 2:
The invention segments the metal wiring layer configuration by creating a distinct corner non-wiring region separate from the main wiring areas. This segmentation isolates the high-stress corner zones from the functional wiring, allowing the passivation layer to be applied uniformly without requiring complex localized structural modifications.
2Reliability
If corner non-wiring region is formed to reduce thermal stress, then crack prevention is improved, but element density may be reduced
Solution Approach 1:
The invention applies local quality by creating corner non-wiring regions only in the corner areas of the semiconductor substrate where thermal stress concentrates, while maintaining full metal wiring coverage in the central and edge regions. This localized approach prevents cracks in the passivation layer at stress-critical corners without reducing the overall element density, as the functional wiring areas remain intact.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces thermal stress on the passivation layer, minimizing crack development and enhancing the reliability and yield of semiconductor integrated circuit devices, while maintaining adequate element density and preventing metal diffusion.
Implementation Method 1
thermal stress resulting from differences in thermal expansion coefficient among an element forming region, a metal wiring layer, and a passivation layer
Data Source
AI summary
A semiconductor integrated circuit device includes: a rectangular shaped semiconductor substrate; a metal wiring layer formed on or over the semiconductor substrate; and a passivation layer covering the metal wiring layer. A corner non-wiring region where no portion of the metal wiring layer is formed is disposed in a corner of the semiconductor substrate. A slit is formed in a portion of the metal wiring layer which is close to the corner of the semiconductor substrate. The passivation layer includes a first passivation layer which is formed on the metal wiring layer and a second passivation layer which is formed on the first passivation layer. The first passivation layer is formed of a material that is softer than a material of the second passivation layer.