Semiconductor IC Probe Test Pad with High Drivability Drive Unit
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Solution Overview
Problem
The existing chip-on-chip package technology for semiconductor ICs faces limitations in increasing operating speed and performing probe tests due to small bump pad sizes, which require separate probe test pads and separate input/output bump pads, leading to increased power consumption and reduced chip area.
Innovation Solution
A semiconductor IC design with separated input/output bump pads, including a probe test pad of larger size, a first output drive unit for normal operation, a second output drive unit with higher drivability for test mode, and a multiplexing unit to connect output data to either drive unit based on a test mode signal, allowing for efficient probe testing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If chip-on-chip package technology is applied with small bump pads (30-μm×30-μm), then operating frequency increases and power consumption reduces, but probe test cannot be performed on the bump pads
Solution Approach 1:
The invention separates the bump pad into two distinct components: a small bump pad (30-μm×30-μm) for normal data transmission and a separate probe test pad (60-μm×60-μm) for testing. This segmentation allows each component to be optimized for its specific function, resolving the contradiction between small size for high-speed operation and large size for probe test capability.
Solution Approach 2:
The probe test pad serves multiple functions: it enables probe testing during manufacturing, facilitates input/output operations, and can be used for both reading and writing data. This multi-functionality eliminates the need for separate test structures while maintaining small bump pad sizes for high-speed operation.
2Ease of operation
If a separate probe test pad is provided in addition to bump pads, then probe test becomes possible, but chip area increases and power consumption increases
Solution Approach 1:
The probe test pad is designed to serve multiple purposes: probe testing, data input, and data output operations. By making the test pad multi-functional, the invention eliminates the need for separate dedicated test structures and reduces the overall chip area compared to having completely separate input and output bump pads.
Solution Approach 2:
The invention combines the probe test function with the input/output data transmission function in a single pad structure. This merging reduces the total number of pads required and minimizes chip area while maintaining both probe test capability and high-speed data transmission.
3Speed
If input and output bump pads are separated, then load is reduced and signal transmission is improved, but device complexity increases
Solution Approach 1:
The invention segments the pad structure into a small bump pad for high-speed data transmission and a separate probe test pad for testing and I/O operations. This segmentation maintains the speed benefits of separated input/output paths while managing complexity through clear functional division.
Solution Approach 2:
The invention implements dynamic switching capability that can connect the probe test pad to either the input buffer or output buffer based on operational mode. This dynamic configuration allows the system to optimize between test mode and normal operation mode, maintaining signal transmission speed while managing structural complexity through flexible connectivity.
Data Source
AI summary
A semiconductor integrated circuit includes a bump pad through which data is outputted, a probe test pad having a larger size than the bump pad, a first output drive unit configured to drive the bump pad at a first drivability in response to output data, a second output drive unit configured to drive the probe test pad at a second drivability higher than the first drivability in response to the output data, and a multiplexing unit configured to transfer the output data to the first output drive unit or the second output drive unit in response to a test mode signal.