Semiconductor IC Simulation Using Dual Abstraction Levels
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Solution Overview
Problem
Existing model-based design techniques for semiconductor integrated circuits face challenges in accurately checking if processing time meets specific conditions while reducing simulation time, as they either prioritize accuracy at the cost of time or speed at the cost of accuracy.
Innovation Solution
The method involves calculating processing time using a low abstraction level model for each circuit component and then simulating the semiconductor integrated circuit using a high abstraction level model, allowing for the verification of processing time against specific conditions while minimizing simulation time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a low abstraction level model is used for simulation, then simulation accuracy is improved, but the time required for simulation is increased
Solution Approach 1:
The patent segments the simulation process into two distinct phases: (1) a detailed low-abstraction simulation phase for critical circuit components to obtain accurate processing times, and (2) a high-abstraction simulation phase for the overall system using pre-calculated parameters. This segmentation allows each phase to use the appropriate level of detail, resolving the contradiction between accuracy and time consumption.
Solution Approach 2:
The patent performs preliminary simulation using low-abstraction models to calculate processing times for critical components before conducting the main high-abstraction system simulation. This preliminary action captures the essential timing characteristics without requiring the full system to be simulated at low abstraction, thereby reducing total simulation time while maintaining accuracy for critical parameters.
2Loss of time
If a high abstraction level model is used for simulation, then the time required for simulation is decreased, but simulation accuracy is reduced
Solution Approach 1:
The patent applies local quality by using high-abstraction models for most circuit components where detailed accuracy is less critical, while applying low-abstraction models specifically to critical components where processing time accuracy is essential. This localized approach maintains overall simulation speed while ensuring accuracy where it matters most.
Solution Approach 2:
The patent introduces processing time parameters as intermediaries that bridge the two abstraction levels. The low-abstraction simulation calculates these intermediary parameters, which are then used to enhance the accuracy of the high-abstraction system simulation without requiring the entire system to be modeled at the detailed level.
3Measurement precision
If detailed processing time verification is performed, then accuracy of checking processing conditions is improved, but productivity is reduced
Solution Approach 1:
The patent applies partial action by performing detailed processing time verification only for critical circuit components and paths that have the greatest impact on system performance, rather than verifying all components in detail. This selective approach maintains verification accuracy for critical elements while significantly improving overall design productivity.
Data Source
AI summary
Simulation of a semiconductor integrated circuit is appropriately performed. An information processing apparatus is provided, the information processing apparatus including: a first calculator calculating a processing time of each of a plurality of circuit components, based on a first abstraction level model corresponding to each of the circuit components included in a semiconductor integrated circuit; and a second calculator simulating processing of the semiconductor integrated circuit, based on the processing time of each of the circuit components calculated by the first calculator and a second abstraction level model having a higher level of abstraction than a level of the first abstraction level model.