Semiconductor Inductive Coupling Pad Placement
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Solution Overview
Problem
In semiconductor devices using inductive coupling between two semiconductor chips, the arrangement of bonding pads on the top surface limits the overlap of inductors, restricting the number of signal terminals and affecting signal transmission reliability and functionality.
Innovation Solution
The semiconductor chips are laminated such that their top surfaces face each other, allowing for the non-overlapping arrangement of pads along multiple sides, enhancing the number of signal terminals and improving signal transmission efficiency by adjusting the positional relation between inductors and pads.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If bonding pads are formed on the top surface side of semiconductor chips to enable external connections, then the semiconductor chips can be connected to external circuits, but the bonding pads overlap with the other semiconductor chip when laminated, restricting the number of signal terminals and affecting signal transmission reliability
Solution Approach 1:
The patent moves bonding pads from the top surface to the side surface of the semiconductor chip. This dimensional transition allows pads to be arranged along the peripheral sides without occupying top surface area, enabling multiple pads to be positioned without overlapping when chips are laminated. The side surface arrangement provides additional spatial dimension for pad placement, increasing the number of available signal terminals while maintaining reliable signal transmission.
2Reliability
If inductors are formed on the top surface side of semiconductor chips for inductive coupling, then signal transmission between chips is enabled, but the inductor arrangement restricts the positioning of bonding pads, limiting the number of signal terminals
Solution Approach 1:
The patent relocates bonding pads from the top surface to the side surface of the semiconductor chip. This separates the functional areas: inductors remain on the top surface for inductive coupling, while pads are positioned on the peripheral sides. This spatial separation eliminates arrangement conflicts between inductors and pads, reducing device complexity while maintaining signal transmission capability.
3Reliability
If semiconductor chips are laminated with top surfaces facing each other for inductive coupling, then signal transmission between chips is achieved, but bonding pads of one chip overlap with the other chip, reducing the number of usable signal terminals
Solution Approach 1:
The patent positions bonding pads on the side surfaces of the semiconductor chip rather than the top surface. When chips are laminated with top surfaces facing each other for inductive coupling, the side surface pads extend laterally along the peripheral sides. This positioning ensures pads do not overlap with the opposing chip, maximizing the available pad area and increasing the number of usable signal terminals.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration increases the number of signal terminals, improves signal handling capabilities, and stabilizes power supply routes, leading to enhanced reliability and functionality of the semiconductor device.
Implementation Method 1
a semiconductor device that transmits signals between two semiconductor chips arranged so as to face each other using inductive coupling of inductors
Data Source
AI summary
An object of the present invention is to improve the performance of a semiconductor device that transmits signals using inductive coupling of inductors.A semiconductor device includes a first semiconductor chip having a first inductor formed on the first top surface side and a second semiconductor chip having a second inductor formed on the second top surface side. The first semiconductor chip and the second semiconductor chip are laminated on each other so that the first top surface and the second top surface face each other. Further, a plurality of first pads of the first semiconductor chip is provided along each of a first chip side and a second chip side among four sides of the first top surface. Further, each of the first pads of the first semiconductor chip is not overlapped with the second semiconductor chip in planar view.