Semiconductor Inductive Coupling With Undulating Insulator
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Solution Overview
Problem
Existing semiconductor device manufacturing techniques face challenges in improving creepage withstand voltage without increasing the overall area of the isolator, leading to complex manufacturing processes and potential decreases in yield and increases in cost.
Innovation Solution
The method involves patterning a conductive film over an interlayer insulating film to form an inductor and conductive pattern, and then creating unevenness on the surface of the interlayer insulating film using the inductor and conductive pattern as a mask, which enhances the creepage distance and withstand voltage between coils with different potentials without adding complexity to the manufacturing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional planar insulating structures are used, then the manufacturing process is simple, but the creepage distance and withstand voltage are insufficient
Solution Approach 1:
The patent applies curvature by forming undulating or wavy patterns on the insulating film surface instead of using flat planar structures. This curvature increases the creepage distance between conductive patterns while maintaining the same footprint area, thereby improving withstand voltage without significantly complicating the manufacturing process
Solution Approach 2:
The patent transitions from two-dimensional planar insulating structures to three-dimensional undulating structures by adding vertical dimension through controlled film thickness variations. This dimensional change creates longer creepage paths through the insulating medium, enhancing dielectric strength and creepage resistance
2Reliability
If the isolator area is increased to improve creepage distance, then the withstand voltage improves, but the overall device area increases
Solution Approach 1:
By introducing undulating patterns in the insulating film, the patent creates longer creepage paths within the same planar footprint. The curved/undulating surface increases the effective path length for creepage current without expanding the device's overall area, thus improving withstand voltage while maintaining compact dimensions
Solution Approach 2:
The patent utilizes the third dimension (vertical thickness variation) to achieve longer creepage distances. By creating undulating structures with controlled amplitude and wavelength, the insulating path length is extended in the vertical direction while maintaining a compact planar footprint, effectively decoupling creepage distance from device area
3Reliability
If unevenness are formed on the insulating film, then the creepage distance increases, but the manufacturing process becomes more complex
Solution Approach 1:
The patent merges the formation of undulating insulating structures with existing manufacturing steps such as spin coating or sputtering processes. By adjusting process parameters (rotation speed, deposition rate, temperature) during standard fabrication, the undulating patterns are created as an integrated part of the manufacturing flow rather than as separate additional steps
Solution Approach 2:
The patent achieves undulating structures by modifying physical parameters of the insulating film formation process, such as controlling film thickness gradients, deposition rates, or thermal processing conditions. These parameter changes enable self-organization of undulating patterns during fabrication, creating the desired geometry without requiring complex lithography or etching steps
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively improves the withstand voltage and reliability of the semiconductor device by reducing leakage current and dielectric breakdown, while simplifying the manufacturing process and maintaining yield and cost efficiency.
Implementation Method 1
forming unevennesses on a surface of the interlayer insulating film by etching a portion of the interlayer insulating film with using the inductor and the conductive pattern as a mask
Implementation Method 2
a pair of inductors inductively coupled to each other that allows signal transmission between different potentials
Data Source
AI summary
A method of manufacturing a semiconductor device includes a step of: patterning a conductive film formed over an interlayer insulating film so as to form a coil and a conductive pattern in the same layer, and then forming unevennesses on a surface of the interlayer insulating film by etching a portion of the interlayer insulating film with using the coil and the conductive pattern as a mask.