Semiconductor Inductor Current Detection Circuit
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing systems for detecting inductor current in power electronics using direct digital conversion of current-voltage conversion circuits often result in significant errors, making it difficult to achieve high accuracy in controlling the inductor current.
Innovation Solution
A semiconductor device configuration that includes a high-side transistor, a PWM signal-generating circuit, a monitor circuit, a current detection circuit, and a sample-and-hold circuit, which generates sampling and holding timings based on monitored potentials to accurately detect and hold the inductor current, reducing noise and error in the detection process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If direct digital conversion of current-voltage conversion circuit output is used, then device complexity is reduced, but measurement precision of inductor current deteriorates
Solution Approach 1:
The sample-and-hold circuit performs preliminary sampling and holding of the detection voltage at specific timing (when the high-side transistor is OFF) before the AD converter digitizes the signal. This preliminary action captures the current state of the inductor current before noise from switching operations corrupts the signal, thereby improving measurement precision without adding complex circuitry.
Solution Approach 2:
The sample-and-hold circuit acts as an intermediary between the current-voltage conversion circuit and the AD converter. It temporarily stores the detection voltage and provides a stable, noise-free signal to the AD converter, mediating the transition from analog current detection to digital conversion while maintaining high accuracy.
2Productivity
If sampling is performed during high-side transistor ON state, then productivity is improved, but object-affected harmful factors increase due to noise
Solution Approach 1:
The harmful noise component is extracted and separated from the useful detection signal by choosing to sample only during the OFF state of the high-side transistor. During the ON state, the switching noise is present but not sampled; during the OFF state, the noise is absent and sampling occurs, thereby taking out the harmful noise from the measurement process while maintaining productivity through efficient timing.
Data Source
AI summary
A monitor circuit monitors a gate potential applied to a gate of a high-side transistor or monitors an output potential generated at an output terminal and generates either one or both of a high-side sampling timing and a high-side holding timing based on the monitored result. A current detection circuit detects an inductor current flowing in an inductor and generates a first detection voltage proportional to the inductor current. A sample-and-hold circuit starts a sampling operation of the first detection voltage in response to the high-side sampling timing and starts a holding operation of the first detection voltage in response to the high-side holding timing so as to output a second detection voltage.