Semiconductor Inductor Integration in Multilayer Wiring
Solution Overview
Problem
The challenge is to miniaturize semiconductor devices while maintaining desired characteristics, particularly in the context of semiconductor devices that include inductors, where reducing the size of transistors does not necessarily reduce the area occupied by the inductor, hindering miniaturization efforts.
Innovation Solution
The semiconductor device incorporates an optical waveguide covered by a multilayer wiring layer, which includes a first and second inductor, allowing for the miniaturization of the device without compromising performance by integrating the inductors within the wiring layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the inductor size is increased to ensure desired characteristics, then the inductor performance is improved, but the overall device area is increased
Solution Approach 1:
The patent merges the inductor with the multilayer wiring layer by forming the inductor using the same conductive material and process steps as the wiring layers. This integration allows the inductor to share the same physical space and manufacturing process as the wiring, eliminating the need for separate inductor fabrication and reducing overall device area while maintaining inductor performance characteristics.
Solution Approach 2:
The multilayer wiring layer serves dual functions: it acts as both the electrical wiring for signal transmission and as the inductor structure for electromagnetic energy storage. This multi-functionality eliminates the need for dedicated separate inductor structures, thereby reducing the device area occupied by inductors while ensuring desired inductor characteristics are maintained.
2Area of stationary object
If the transistor size is reduced to miniaturize the device, then the device area is reduced, but the inductor area cannot be reduced accordingly
Solution Approach 1:
By combining the inductor formation process with the multilayer wiring formation process, the patent eliminates separate inductor fabrication steps. The inductor is formed using the same conductive material deposition, patterning, and stacking processes as the wiring layers, thereby reducing manufacturing complexity despite the integrated nature of the structure.
Solution Approach 2:
The patent utilizes the vertical dimension by forming the inductor through multiple stacked wiring layers rather than expanding it horizontally. The inductor is created by stacking conductive layers vertically, allowing compact three-dimensional integration that reduces the planar area occupied by inductors while maintaining the necessary inductance value.
Data Source
AI summary
A semiconductor device includes an insulating layer, an optical waveguide formed on the insulating layer, a multilayer wiring layer formed on the insulating layer such that the multilayer wiring layer covers the optical waveguide, and a first inductor formed in the multilayer wiring layer.